US3881180A
Expired / Lapsed
US
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Non-volatile memory cell
Assignee: Texas Instruments Inc
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Filing: 1973-10-19
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Granted: 1975-04-29
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Expires: 1993-10-19
Abstract
Abstract Disclosed is a method which utilizes an insulated gate fieldeffect semiconductor device having a gate isolation comprised of at least two different gate isolation materials as a programmable non-volatile memory. Writing into the memory is accomplished by increasing the threshold voltage from its intrinsic device level to a second more positive level by trapping charges of one polarity in the gate isolation layers. Erasing the memory is accomplished by injecting into the gate isolation layers charges of opposite polarity, thereby neutralizing the previously stored charge and causing the modified device threshold voltage to return to substantially the intrinsic value.
Inventors
- 👤 Jr William Milton Gosney
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 07:18
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0466; H; H10; H10D; H10D30/00; H10D30/60; H10D30/69
Claims Analysis
Total Claims: 36
Claim 1
Independent Claim
111 words
A non-volatile reprogrammable semiconductor read-only-memory device comprising: a. a substrate of one conductivity type; b. first and second pockets of opposite conductivity type within the surface of said substrate, said pockets separated by a channel region of said substrate; c. a first isolation layer overlying said first and second pockets of opposite conductivity; d. a floating gate conductor layer overlying said isolation layer above said first and second pockets; e. a second isolation layer overlying said gate conductor layer, thereby electrically isolating said floating gate metal layer; and f. injector means underlying said floating gate conductor layer comprising a PN junction modified to lessen its breakdown voltage and thereby facilitate avalanching.
Claim 2
Dependent Claim
111 words
A non-volatile reprogrammable semiconductor read-only-memory device comprising: a. a substrate of one conductivity type; b. first and second pockets of opposite conductivity type within the surface of said substrate, said pockets separated by a channel region of said substrate; c. a first isolation layer overlying said first and second pockets of opposite conductivity; d. a floating gate conductor layer overlying said isolation layer above said first and second pockets; e. a second isolation layer overlying said gate conductor layer, thereby electrically isolating said floating gate metal layer; and f. injector means underlying said floating gate conductor layer comprising a PN junction modified to lessen its breakdown voltage and thereby facilitate avalanching.
Claim 3
Dependent Claim
14 words
The reprogrammable read-only-memory device of claim 1 wherein said isolation layers are silicon oxide.
Claim 4
Dependent Claim
94 words
The reprogrammable read-only-memory device of claim 2 wherein said injector means comprises: a. a first region of semiconductor material of said opposite type in said substrate spaced from said pockets of said opposite conductivity type; b. a second region of highly concentrated semiconductor material of said one type in said first region and extending into said substrate for lowering the avalanche voltage of said region; c. a nitride layer overlying said first and second bodies and underlying said gate layer; and d. an electrical contact to said p-region for application of a high voltage.
Claim 5
Dependent Claim
101 words
The read-only-memory device of claim 1 further comprising an electron injector diode underlying said gate layer comprising: a. a third doped semiconductory pocket of said opposite type in said substrate spaced from said first and second pockets; b. a fourth highly doped semiconductor pocket in said third pocket for Lowering the avalanche voltage at the junction of said third and fourth pockets; c. a gate oxide region overlying said third and fourth pockets and underlying said gate layer for conducting electrons to said gate layer; and d. a fourth electrical contact to said third pocket for application of a high voltage.
Claim 6
Dependent Claim
18 words
The read-only-memory device of claim 4 wherein said one conductivity type is n-type and said opposite is p-type.
Claim 7
Dependent Claim
108 words
A non-volatile reprogrammable semiconductor read-only-memory device comprising: a. a substrate of one conductivity type; b. first and second spaced pockets of opposite conductivity type deposited within the surface of said substrate; c. a first isolation region overlying and contiguous with said first pocket of opposite conductivity, said isolation region characterized by its conducting holes and its trapping electron carriers; d. a second isolation region spaced from said first isolation region and overlying and contiguous with said second pocket of opposite conductivity type, said second insulating region characterized by its conducting electrons and its trapping holes; and e. a floating conductor layer overlying said first and second isolation layers.
Claim 8
Dependent Claim
108 words
A non-volatile reprogrammable semiconductor read-only-memory device comprising: a. a substrate of one conductivity type; b. first and second spaced pockets of opposite conductivity type deposited within the surface of said substrate; c. a first isolation region overlying and contiguous with said first pocket of opposite conductivity, said isolation region characterized by its conducting holes and its trapping electron carriers; d. a second isolation region spaced from said first isolation region and overlying and contiguous with said second pocket of opposite conductivity type, said second insulating region characterized by its conducting electrons and its trapping holes; and e. a floating conductor layer overlying said first and second isolation layers.
Claim 9
Dependent Claim
18 words
The non-volatile reprogrammable memory device according to claim 6 wherein said gate layer is electrically insulated and floating.
Claim 10
Dependent Claim
23 words
The read-only-memory device of claim 7 wherein a thick oxide separates and surrounds said first and second regions and underlies said gate layer.
Claim 11
Dependent Claim
22 words
The read-only-memory device of claim 7 wherein said conductivity of one type is n-type and said conductivity of opposite type is p-type.
Claim 12
Dependent Claim
16 words
The read-only-memory device of claim 9 wherein said first isolation region is comprised of silicon nitride.
Claim 13
Dependent Claim
16 words
The read-only-memory device of claim 10 wherein said second isolation region is comprised of silicon oxide.
Claim 14
Independent Claim
148 words
The method of programming an insulated gate field effect memory device having a substrate of one conductivity type, first and second pockets therein of opposite conductivity type forming first and second pn junctions, a gate region, and further having first and second adjacent but spaced gate isolation layers respectively overlying said junctions, said first gate isolation layer passing charge carriers of one polarity type and trapping charge carriers of opposite polarity type and said second isolation layer conducting carriers of opposite polarity type and trapping layers of said one polarity type, comprising: a. avalanching said second junction to shift the threshold voltage of the insulated gate field effect device from a first level to a second level for writing information into the cell; and b. avalanching said first junction to return the threshold voltage to substantially said first voltage level for erasing the information from said memory cell.
Claim 15
Independent Claim
148 words
The method of programming an insulated gate field effect memory device having a substrate of one conductivity type, first and second pockets therein of opposite conductivity type forming first and second pn junctions, a gate region, and further having first and second adjacent but spaced gate isolation layers respectively overlying said junctions, said first gate isolation layer passing charge carriers of one polarity type and trapping charge carriers of opposite polarity type and said second isolation layer conducting carriers of opposite polarity type and trapping layers of said one polarity type, comprising: a. avalanching said second junction to shift the threshold voltage of the insulated gate field effect device from a first level to a second level for writing information into the cell; and b. avalanching said first junction to return the threshold voltage to substantially said first voltage level for erasing the information from said memory cell.
Claim 16
Dependent Claim
44 words
The method of claim 12 wherein said step of avalanching to shift the threshold voltage comprises passing said charge carriers of opposite polarity type through said second gate isolation layer, whereby said charges redistribute upon said gate region and cause said channel to invert.
Claim 17
Dependent Claim
50 words
The method of claim 13 wherein said step of avalanching to return the threshold voltage comprises passing charges of said one polarity type through said first gate isolation layer to said gate region and thereby neutralizing said pre-existing charges of opposite polarity type, said neutralization allowing said channel to reinvert.
Claim 18
Dependent Claim
84 words
A non-volatile reprogrammable semiconductor memory device comprising: a. a substrate of one conductivity type; b. first and second pockets of opposite conductivity type within the surface of said substrate, said pockets forming first and second pn junctions with said substrate; c. a first isolation layer overlying said first and second pockets of opposite conductivity; d. a floating gate conductor region overlying said isolation layer above said first and second pockets; and e. injector meanS underlying said gate conductor layer comprising another pn semiconductor junction.
Claim 19
Dependent Claim
84 words
A non-volatile reprogrammable semiconductor memory device comprising: a. a substrate of one conductivity type; b. first and second pockets of opposite conductivity type within the surface of said substrate, said pockets forming first and second pn junctions with said substrate; c. a first isolation layer overlying said first and second pockets of opposite conductivity; d. a floating gate conductor region overlying said isolation layer above said first and second pockets; and e. injector meanS underlying said gate conductor layer comprising another pn semiconductor junction.
Claim 20
Dependent Claim
34 words
The non-volatile reprogrammable memory according to claim 15 wherein said another pn junction comprises a third pocket of opposite conductivity type spaced from said first and second pockets within the surface of said substrate.
Claim 21
Dependent Claim
42 words
The non-volatile reprogrammable memory according to claim 16 and further including a highly doped region of said one type in said surface underlying said gate layer and extending into said third pocket for lowering the avalanche voltage of said another pn junction.
Claim 22
Dependent Claim
14 words
The non-volatile reprogrammable semiconductor memory according to claim 17 wherein said semiconductor is silicon.
Claim 23
Dependent Claim
21 words
The non-volatile reprogrammable semiconductor memory according to claim 18 wherein said one type is n-type and said opposite type is p-type.
Claim 24
Dependent Claim
25 words
The non-volatile reprogrammable memory according to claim 19 wherein said first isolation layer overlies said another pn junction, and said first isolation layer comprises oxide.
Claim 25
Dependent Claim
35 words
The non-volatile reprogrammable memory according to claim 19 and further including a fourth pocket of opposite conductivity type disposed within the surface of said substrate underlying said gate layer to provide still another pn junction.
Claim 26
Dependent Claim
30 words
The non-volatile reprogrammable memory according to claim 19 and including an isolation region overlying said still another pn junction and underlying said gate layer to provide a hole injector means.
Claim 27
Dependent Claim
40 words
The non-volatile reprogrammable memory according to claim 21 wherein said highly doped region of said one conductivity type extending into said third pocket also extends into said fourth pocket to thereby lower the avalanche voltage of still another pn junction.
Claim 28
Dependent Claim
14 words
The non-volatile reprogrammable memory according to claim 22 wherein said isolation region comprises nitride.
Claim 29
Dependent Claim
43 words
The non-volatile reprogrammable memory according to claim 23 wherein said first isolation layer overlies said another pn junction, and including another isolation region overlying said still another pn junction which region is characterized by the trapping of electrons and the passing of holes.
Claim 30
Dependent Claim
14 words
The non-volatile reprogrammable memory according to claim 25 wherein said isolation region comprises nitride.
Claim 31
Dependent Claim
47 words
The non-volatile semiconductor read-only-memory device according to claim 7 and further including a highly concentrated layer of said one conductivity type within the surface of said substrate and into said first and second pockets for causing a lower avalanche breakdown voltage between said pockets and said substrate.
Claim 32
Dependent Claim
57 words
The non-volatile semiconductor read-only-memory device according to claim 27 including electrical contacts to said first and second pockets and wherein said first pocket provides both a hole injector and the source of an insulated gate field effect transistor, and said second pocket provides both an electron injector and the drain of said insulated gate field effect transistor.
Claim 33
Dependent Claim
67 words
A non-volatile reprogrammable semiconductor memory comprising: a. a substrate; b. a floating gate overlying said substrate; c. hole injector means at least partially underlying said gate and in said substrate; and d. electron injector means at least partially underlying said gate, and spaced from said hole injector means in said substrate whereby said floating gate is selectively electrically charged and discharged by said hole and electron injectors.
Claim 34
Dependent Claim
67 words
A non-volatile reprogrammable semiconductor memory comprising: a. a substrate; b. a floating gate overlying said substrate; c. hole injector means at least partially underlying said gate and in said substrate; and d. electron injector means at least partially underlying said gate, and spaced from said hole injector means in said substrate whereby said floating gate is selectively electrically charged and discharged by said hole and electron injectors.
Claim 35
Dependent Claim
74 words
In a semiconductor memory device having a floating gate conductor overlying at least portions of first and second spaced pockets of one conductivity type which pockets are disposed in a substrate of the opposite conductivity type forming first and second pn junctions, the improvement wherein at least one of said portions has a highly doped region of said opposite conductivity type extending therein to lower the avalanche voltage of the pn junction formed thereby.
Claim 36
Dependent Claim
74 words
In a semiconductor memory device having a floating gate conductor overlying at least portions of first and second spaced pockets of one conductivity type which pockets are disposed in a substrate of the opposite conductivity type forming first and second pn junctions, the improvement wherein at least one of said portions has a highly doped region of said opposite conductivity type extending therein to lower the avalanche voltage of the pn junction formed thereby.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-04-28 | 1978-10-28 | 1979-04-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-04-28 | 1982-10-28 | 1983-04-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-04-28 | 1986-10-28 | 1987-04-29 | $7700.00 | Window Closed / Lapsed |