Integrated circuit SOS memory subsystem and method of making same
Abstract
Abstract An integrated circuit silicon-on-sapphire memory subsystem and the method of making same is disclosed. The subsystem comprises an insulating sapphire substrate, an array of memory circuits disposed on one surface of the substrate, a bus system disposed on the substrate for carrying electrical signals and power from a power source to selected ones of the memory circuits, and a plurality of fuses, each fuse comprised of a semiconductive material and interconnecting the bus system to a selected memory circuit. In order to determine which of the array of memory circuits are selected to be part of the memory subsystem, the operability of the memory circuits is tested. If a memory circuit is found unacceptable, the fuse connecting it to the bus system is blown so as to electrically isolate that memory circuit from the acceptable memory circuits.
Inventors
- 👤 Frank M Wanlass
Bibliographic Details
Claims Analysis
Total Claims: 8References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-04-28 | 1978-10-28 | 1979-04-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-04-28 | 1982-10-28 | 1983-04-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-04-28 | 1986-10-28 | 1987-04-29 | $7700.00 | Window Closed / Lapsed |