Patent US3877059A successfully refreshed from Google Patents.
US3877059A
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US
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Single diffused monolithic darlington circuit and method of manufacture thereof
Assignee: Motorola Solutions Inc
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Filing: 1974-09-30
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Granted: 1975-04-08
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Expires: 1994-09-30
Abstract
Abstract A single-diffused structure for a monolithic Darlington transistor circuit and method for fabricating same. Mesa type emitter regions for the input and output transistors and a common collector region are simultaneously deeply diffused into a semiconductor wafer which forms a common base layer. The input transistor for each Darlington circuit includes a rectangular emitter mesa region, having an aperture therein to allow contact to the base layer, is located in a corner of each die and extends to the edge of the die. The resistance parallel to the emitterbase junction of the input transistor includes the distributed resistance of the material in the base layer extending from the base contact area within the emitter aperture beneath the surrounding emitter mesa region to an area contacted by an emitter-base shorting metal layer at the periphery of the input emitter mesa. During the fabrication of monolithic Darlington circuits on a silicon wafer a single mesa region forms the apertured emitters of an array of four Darlington circuits, each rotated 90.degree. with respect to the adjacent ones, prior to the scribing and die separation operations, whereby the single mesa region extends across the scribe grid areas separating the circuits. After the metal pattern is applied the semiconductor wafer is laser scribed and the monlithic dice are separated.
Inventors
- 👤 Carl Edwin Dockendorf
- 👤 Frank Joseph Reznick
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 23:33
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/641; H10D84/642; H10D84/611; H10D84/613; H10D88/00; H10D99/00
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
181 words
A monolithic Darlington transistor circuit having an input transistor and an output transistor comprising: a multi-sided body of semiconductor material of a first conductivity type forming the base regions of the input and output transistors of the Darlington transistor circuit, each of said sides being perpendicular to a major surface of said body of semiconductor material; a diffused collector region of a second conductivity type in the lower surface of said body of said semiconductor material forming the collector regions of the input and output transistors; a first mesa type diffused emitter in the upper surface of said body of semiconductor material forming the emitter of the input transistor and having therein an aperture exposing said body of semiconductor material wherein said first mesa type diffused emitter is located to extend to the edge of said multi-sided body at least at two adjacent sides thereof in the monolithic Darlington transistor circuit for reducing lateral active base-emitter area; and a second mesa type diffused emitter in the upper surface of said body of semiconductor material forming the emitter of the output transistor.
Claim 2
Dependent Claim
181 words
A monolithic Darlington transistor circuit having an input transistor and an output transistor comprising: a multi-sided body of semiconductor material of a first conductivity type forming the base regions of the input and output transistors of the Darlington transistor circuit, each of said sides being perpendicular to a major surface of said body of semiconductor material; a diffused collector region of a second conductivity type in the lower surface of said body of said semiconductor material forming the collector regions of the input and output transistors; a first mesa type diffused emitter in the upper surface of said body of semiconductor material forming the emitter of the input transistor and having therein an aperture exposing said body of semiconductor material wherein said first mesa type diffused emitter is located to extend to the edge of said multi-sided body at least at two adjacent sides thereof in the monolithic Darlington transistor circuit for reducing lateral active base-emitter area; and a second mesa type diffused emitter in the upper surface of said body of semiconductor material forming the emitter of the output transistor.
Claim 3
Dependent Claim
71 words
The monolithic Darlington transistor circuit as recited in claim 1 further including a first metal conductor contacting said body of semiconductor material within the aperture of said first mesa type diffused emitter, and spaced therefrom to avoid contacting said first mesa type diffused emitter, said first metal conductor being connected to a first terminal of the monolithic Darlington transistor circuit to provide base current to the base of the input transistor.
Claim 4
Dependent Claim
80 words
The monolithic Darlington transistor circuit as recited in claim 1 further including a second metal conductor contacting said first mesa type diffused emitter and said body of semiconductor material for establishing a uniform potential in said first mesa type diffused emitter and on the exposed surface of said body of semiconductor material, and for establishing a short circuit connection between the outside periphery of said first mesa type diffused emitter and the adjacent area of said body of semiconductor material.
Claim 5
Dependent Claim
79 words
The monolithic Darlington transistor circuit as recited in claim 3 further including a third metal conductor contacting said second mesa type diffused emitter and said body of semiconductor material for establishing a uniform potential in said second mesa type diffused emitter and for establishing a short circuit connection between said second mesa type diffused emitter and an area of said body of semiconductor material, said third metal conductor connected to a second terminal of said monolithic Darlington transistor circuit.
Claim 6
Dependent Claim
37 words
The monolithic Darlington transistor circuit as recited in claim 1 further including a fourth metal conductor contacting said diffused collector region, said fourth metal conductor also connected to a third terminal of said monolithic Darlington transistor circuit.
Claim 7
Dependent Claim
45 words
The monolithic Darlington transistor circuit as recited in claim 3 wherein the spacing between said first metal conductor and the area where said second metal conductor contacts said body of semiconductor material provides a predetermined resistance between the base and emitter of the input transistor.
Claim 8
Dependent Claim
45 words
The monolithic Darlington transistor circuit as recited in claim 4 wherein the spacing between the area where said third metal conductor contacts said body of semiconductor material and said second metal conductor provides a predetermined resistance between the base and emitter of the output transistor.
References Cited (Backward Citations)
US3624454A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-04-07 | 1978-10-07 | 1979-04-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-04-07 | 1982-10-07 | 1983-04-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-04-07 | 1986-10-07 | 1987-04-08 | $7700.00 | Window Closed / Lapsed |