Antiglitch digital to analog converter system

Claim 2

A digital-to-analog converter system comprising first and second digital-to-analog converters; means for applying digital inputs to said first and second digital-to-analog converters; multiplexing means connected to the outputs of said first and second digital-to-analog converters and operable to transmit an analog output signal derived alternately from either one of said first and second digital-to-analog converters; said multiplexing means including respective balanced amplifiers each having a pair of inputs, a first input connected to the outputs of the respective first and second digital-to-analog converters, and a second input connected to respective balance impedance means operable to maintain balance between said first and second inputs of each said balanced amplifier during operation of said multiplexing means; an output amplifier having a pair of inputs connected in parallel to the respective pairs of outputs of said balanced amplifiers; and respective negative feedback paths connected between the output of said output amplifier and the respective first inputs of said balanced amplifiers; said control means effective for alternately enabling said first inputs of said balanced amplifiers, said control means including a current source, a differential current switch connected between said current source and said balanced amplifiers, and an alternating signal source connected to said differential current switch for alternately connecting and disconnecting said current source with said respective balanced amplifiers for enablement of the first input of the balanced amplifier to which said current source is connected and disablement of the first input of said balanced amplifier from which said current source is disconnected; said control means being adapted for synchronization with said digital input applying means for regulating the transmission of the outputs of said first and second digital-to-analog converters by said multiplexing means to prevent transmission of the output of either of said first and second digital-to-analog converters during a period when the digital input thereto is being changed from one value to another.

Claim 3

A digital analog converter system comprising first and second digital-to-analog converters; means for applying digital inputs to said first and second digital-to-analog converters; multiplexing means connected to the outputs of said first and second digital-to-analog converters and operable to transmit an analog output signal derived alternately from either one of said first and second digital-to-analog converters; respective negative feedback lines connected to the output of said multiplexing means and the corresponding one of the outputs of said first and second digital-to-analog converters; said multiplexing means including first and second transistor balanced amplifiers each including a first input connected to the outputs of said first and second digital-to-analog converters respectively, said balanced amplifiers further each including a second input and respective impedance compensating networks connected with said second inputs for matching the impedance of said second inputs of said balanced amplifiers so as to maintain balance between said first and second inputs of each said balanced amplifier during operation of said multiplexing means; and control means effective for alternately enabling said first inputs of said balanced amplifiers, said control means including a current source, a differential current switch connected between said current source and said balanced amplifiers, and an alternating signal source connected to said differential current switch to change the switch between a first switching state wherein it connects the current source to said first balanced amplifier to enable said first digital-to-analog converter to transmit a steady state analog signal from the output of said first digital-to-analog converter while disabling the second balanced amplifier and a second switching state wherein it connects the said current source to said second balanced amplifier to enable the second digital-to-analog converter to transmit a steady state analog signal from the output of the second digital-to-analog converter while disabling said first balanced amplifier; said control means being adapted for operation to regulate the transmission of the outputs of said first and second digital-to-analog converters by said multiplexing means to prevent transmission of the output of either of said first and second digital-to-analog converters during a period when the digital input thereto is being changed from one value to another.

Claim 4

A digital analog converter system comprising first and second digital-to-analog converters; means for applying digital inputs to said first and second digital-to-analog converters; multiplexing means connected to the outputs of said first and second digital-to-analog converters and operable to transmit an analog output signal derived alternately from either one of said first and second digital-to-analog converters; respective negative feedback lines connected to the output of said multiplexing means and the corresponding one of the outputs of said first and second digital-to-analog converters; said multiplexing means including first and second transistor balanced amplifiers each including a first input connected to the outputs of said first and second digital-to-analog converters respectively, said balanced amplifiers further each including a second input and respective impedance compensating networks connected with said second inputs for matching the impedance of said second inputs of said balanced amplifiers so as to maintain balance between said first and second inputs of each said balanced amplifier during operation of said multiplexing means; and control means effective for alternately enabling said first inputs of said balanced amplifiers, said control means including a current source, a differential current switch connected between said current source and said balanced amplifiers, and an alternating signal source connected to said differential current switch to change the switch between a first switching state wherein it connects the current source to said first balanced amplifier to enable said first digital-to-analog converter to transmit a steady state analog signal from the output of said first digital-to-analog converter while disabling the second balanced amplifier and a second switching state wherein it connects the said current source to said second balanced amplifier to enable the second digital-to-analog converter to transmit a steady state analog signal from the output of the second digital-to-analog converter while disabling said first balanced amplifier; said control means being adapted for operation to regulate the transmission of the outputs of said first and second digital-to-analog converters by said multiplexing means to prevent transmission of the output of either of said first and second digital-to-analog converters during a period when the digital input thereto is being changed from one value to another.

Claim 5

A digital analog converter system comprising first and second digital-to-analog converters; means for applying digital inputs to said first and second digital-to-analog converters; multiplexing means connected to the outputs of said first and second digital-to-analog converters and operable to transmit an analog output signal derived alternately from either one of said first and second digital-to-analog converters; said multiplexing means including an input stage having first and second differential cascode amplifiers respectively associated with said first and second digital-to-analog converters; each of said first and second differential cascode amplifiers including a pair of field effect transistors having a common source configuration, a first transistor of each pair of field effect transistors having an input connected to the outputs of the first and second digital-to-analog converters respectively; first and second transistors having emitters connected to the drains of the first and second field effect transistors respectively; means for reverse biasing said first and second transistors to prevent current breakthrough when said first and second transistors are in a non-conductive state; balance impedance means connected to the inputs of the second transistor of each said pair of field effect transistors to maintain balance between the first and second inputs of respective field effect transistor pairs during operation of said multiplexing means;

Claim 6

A digital analog converter system comprising first and second digital-to-analog converters; means for applying digital inputs to said first and second digital-to-analog converters; multiplexing means connected to the outputs of said first and second digital-to-analog converters and operable to transmit an analog output signal derived alternately from either one of said first and second digital-to-analog converters; said multiplexing means including an input stage having first and second differential cascode amplifiers respectively associated with said first and second digital-to-analog converters; each of said first and second differential cascode amplifiers including a pair of field effect transistors having a common source configuration, a first transistor of each pair of field effect transistors having an input connected to the outputs of the first and second digital-to-analog converters respectively; first and second transistors having emitters connected to the drains of the first and second field effect transistors respectively; means for reverse biasing said first and second transistors to prevent current breakthrough when said first and second transistors are in a non-conductive state; balance impedance means connected to the inputs of the second transistor of each said pair of field effect transistors to maintain balance between the first and second inputs of respective field effect transistor pairs during operation of said multiplexing means;