Patent US5664018A successfully refreshed from Google Patents.
Patent US3876832A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3876832A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital cryptographic system and method

Assignee: Individual
•
Filing: 1972-10-20
•
Granted: 1975-04-08
•
Expires: 1992-10-20
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The specification discloses a digital cryptographic system operating under a digital coding scheme having forbidden control characters with common bit characteristics. In the encoding mode, clear digital data and randomized digital data are stored and selected bits of the clear and randomized digital data are modulo-2 added. The added bits are then examined to determine whether or not the bits have the common bit characteristics of the forbidden control characters. If so, the selected bits of the stored clear digital data are varied to prevent the subsequent generation of forbidden control characters in the encoded data. The clear digital data and randomized digital data are then modulo-2 added to generate encoded data. The present system is compatible with eight-level digital codes and the system includes parity bit checking techniques to ensure accuracy of operation. The present system may be operated as either an On-line or Offline system and may be utilized to provide security of digital transmission between teleprinters or between a teleprinter and a digital computer or the like.

Inventors

  • 👤 Barrie O Morgan
  • 👤 Kenneth M Branscome
  • 👤 George E Goode
  • 👤 John Q Atchley

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 02:25
CPC Classifications
H; H04; H04L; H04L9/00; H04L9/36

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 105 words
A cryptographic system operating under a digital coding scheme having forbidden control characters with common characteristics comprising: means for storing clear digital words and randomized digital words each having n bits, circuitry for enciphering less than n bits of each of said clear digital words with less than n bits of each of said randomized digital words to generate encoded bits, means for varying said stored clear digital words upon the occurrence of said common characteristics in said encoded bits indicative of said forbidden control characters, and means responsive to said stored clear digital words and said randomized digital words for generating encoded digital characters.
Claim 2
Dependent Claim 105 words
A cryptographic system operating under a digital coding scheme having forbidden control characters with common characteristics comprising: means for storing clear digital words and randomized digital words each having n bits, circuitry for enciphering less than n bits of each of said clear digital words with less than n bits of each of said randomized digital words to generate encoded bits, means for varying said stored clear digital words upon the occurrence of said common characteristics in said encoded bits indicative of said forbidden control characters, and means responsive to said stored clear digital words and said randomized digital words for generating encoded digital characters.
Claim 3
Dependent Claim 14 words
The cryptographic system of claim 1 wherein said combining circiutry comprises modulo-2 addition circuitry.
Claim 4
Dependent Claim 16 words
The cryptographic system of claim 1 wherein said digital coding scheme comprises an eight level code.
Claim 5
Dependent Claim 18 words
The cryptographic system of claim 1 wherein said common characteristics comprise common binary levels of common bit positions.
Claim 6
Dependent Claim 27 words
The cryptographic system of claim 1 wherein said common characteristics comprise logic zero levels of the sixth and seventh bit positions in an eight level coding scheme.
Claim 7
Dependent Claim 23 words
The cryptographic system of claim 1 wherein said stored clear digital words are varied by changing the binary value of predetermined bit positions.
Claim 8
Dependent Claim 144 words
In a cryptographic system operating under an eight level digital coding scheme having forbidden control characters with common characteristics in the sixth and seventh bits, the combination comprising: means for generating randomized digital words having eight digital bits, means for combining the sixth and seventh digital bits of each randomized digital word with the sixth and seventh digital bits of each eight bit clear digital words to generate pairs of encoded bits, means responsive to said pairs of encoded bits for detecting said common characteristics of said forbidden control characters, means responsive to said detecting means for changing said sixth and seventh bits of a clear digital word upon the occurrence of said common characteristics in order to prevent the generation of a forbidden control character, and means for combining said randomized digital words with said clear digital words to generate encoded digital data.
Claim 9
Dependent Claim 144 words
In a cryptographic system operating under an eight level digital coding scheme having forbidden control characters with common characteristics in the sixth and seventh bits, the combination comprising: means for generating randomized digital words having eight digital bits, means for combining the sixth and seventh digital bits of each randomized digital word with the sixth and seventh digital bits of each eight bit clear digital words to generate pairs of encoded bits, means responsive to said pairs of encoded bits for detecting said common characteristics of said forbidden control characters, means responsive to said detecting means for changing said sixth and seventh bits of a clear digital word upon the occurrence of said common characteristics in order to prevent the generation of a forbidden control character, and means for combining said randomized digital words with said clear digital words to generate encoded digital data.
Claim 10
Dependent Claim 83 words
The combination of claim 7 wherein said digital coding scheme has at least eight levels and further comprising: registers for storing said randomized digital bits and said clear digital data, adder means for modulo-2 adding selected bits of said randomized digital bits and said clear digital data, logic means for detecting a predetermined digital value of the output of said adder means, and means responsive to said logic means for varying the digital value of said selected bits of said clear digital data.
Claim 11
Dependent Claim 19 words
The combination of claim 7 wherein said predetermined digital value comprises logic zero for a pair of digital bits.

References Cited (Backward Citations)

US2406829A Cited
US2406023A Cited
US2874215A Cited
US3749832A Cited
US3546380A Cited
US3496291A Cited
US3480915A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-04-07 1978-10-07 1979-04-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-04-07 1982-10-07 1983-04-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-04-07 1986-10-07 1987-04-08 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag