Patent US3866094A successfully refreshed from Google Patents.
US3866094A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Inhibited power supplies
Assignee: General Electric Canada Co
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Filing: 1973-05-21
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Granted: 1975-02-11
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Expires: 1993-05-21
Abstract
Abstract An AC to DC power supply is provided for supplying DC to switch voltage level detector which is used with a fault detecting circuit as the control signal source when faults are detected. The DC side of the power supply includes means for inhibiting operation of the level detector during interruptions of the AC source, even though momentarily, and thereby stop the level detector from giving spurious control signals due to the interruptions. The inhibit means consists of an electronic switch in the power supply to the level detector and a switch control circuit consisting of voltage regulating means in combination with capacitance. At normal AC voltages, the switch control keeps the switched turned ''''on'''' and during interruption it makes the switch turn ''''off.
Inventors
- 👤 David Richard Boothman
- 👤 David Walter Nutt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 10:51
CPC Classifications
H; H02; H02H; H02H1/00; H02H1/04; H02H1/06
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
162 words
In a fault detection circuit used for rotecting electrical apparatus against overvoltges, the combination comprising: a voltage level detector for comparing a reference voltage and a monitored voltage, said voltage level detector producing an overvoltage signal in response to a predetermined difference between said reference voltage and said monitored voltage; a power supply for providing said reference voltage comprising Ac input terminals, a rectifier connected to said terminals for converting alternating current into unidirectional current, capacitance means connected to the output of said rectifier for smoothing out said unidirectional current and establishing a level of DC voltage, and a vooltage regulator connected to said capacitance means for producing sai reference voltage of lower value than said DC voltage level; ormally ''''off'''' electroic switching means connected to be turned ''''on'''' by said reference voltge; and means coupling said switching means to said voltage level detector for inhibiting the production of said over-voltage signal when said reference voltage falls below a predetermined voltage level.
Claim 2
Dependent Claim
162 words
In a fault detection circuit used for rotecting electrical apparatus against overvoltges, the combination comprising: a voltage level detector for comparing a reference voltage and a monitored voltage, said voltage level detector producing an overvoltage signal in response to a predetermined difference between said reference voltage and said monitored voltage; a power supply for providing said reference voltage comprising Ac input terminals, a rectifier connected to said terminals for converting alternating current into unidirectional current, capacitance means connected to the output of said rectifier for smoothing out said unidirectional current and establishing a level of DC voltage, and a vooltage regulator connected to said capacitance means for producing sai reference voltage of lower value than said DC voltage level; ormally ''''off'''' electroic switching means connected to be turned ''''on'''' by said reference voltge; and means coupling said switching means to said voltage level detector for inhibiting the production of said over-voltage signal when said reference voltage falls below a predetermined voltage level.
Claim 3
Dependent Claim
81 words
The invention defined in Claim 1, wherein said normally ''''off'''' electronic switching means comprises a transistor, the emitter-collector terminals of said transistor being coupled between said voltage level detector and a soure of energizing potential a zener diode breaking over at a lower voltage than said reference voltage; and means coupling said zener dioe between said reference voltage and the base terminal of said transistor, whereby said transistor is rendered nonconductive when said reference voltage falls below said predetermined voltage level.
Claim 4
Dependent Claim
72 words
The invention defined in claim 2, wherein said reference voltage is carried on a positive bus, said zener diode has its cathode connected to said bus, said transistor is a NPN transistor having its base connected to the anode of the zener diode and its eitter to a point of common potential, and said voltage level detector includes energizing terminals connected between said positive bus and the collector of said transistor respectively.
Claim 5
Dependent Claim
73 words
The invention defined in claim 2, wherein said reference voltage appears on a positive bus, said transistor is a PNP transistor having its emitter connected to said bus and its base to the cathode of said zener diode, said zener diode has its anode connected to a point of common potentil, and said voltage level detector includes energizing terminals connected between said point of common potential and the collector of said transistor respectively.
Claim 6
Dependent Claim
71 words
The invention defined in claim 2, wherein said reference voltage appears on a negative bus, said zener diode has its anode connected to said bus, said transistor is a PNP transistor having its base connected to the cathode of said zener diode and its emitter to a point of common potential, and said voltage level detector includes energizing terminals connected between said negative bus and the collector of said transistor respectively.
Claim 7
Dependent Claim
74 words
The invention defined in claim 2, wherein said reference voltage appears upon a negative bus, said transistor is a NPN transistor having its emitter connected to said bus and its base connected to the anode of said zener diode, said zener diode having its cathode connected to a point of common potential, and said voltage level detector includes energizing trminals connected between said point of common potential and the collector of said transistor respectively.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-02-10 | 1978-08-12 | 1979-02-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-02-10 | 1982-08-12 | 1983-02-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-02-10 | 1986-08-12 | 1987-02-11 | $7700.00 | Window Closed / Lapsed |