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US3866065A Expired / Lapsed US ⏱️ 0.0 years remaining

Waveform control circuit using gain-controlled amplifier stage

Assignee: United States Department of the Army
•
Filing: 1974-02-21
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Granted: 1975-02-11
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Expires: 1994-02-21
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Abstract

Abstract A circuit using a slope generator and an inverter providing biases for a network including a parallel combination of series connected diodes and resistors. The network is connected between a voltage source and a gain control input of an amplifier stage. The biases control turn-on of the diodes in the network to vary the voltage applied to the gain control input.

Inventors

  • 👤 Pat H Mcingvale

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 01:34
CPC Classifications
H; H03; H03G; H03G1/00; H03G1/0005; H03G1/0088

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 375 words
An electrical waveform control circuit employing a gain controlled amplifier stage wherein said stage has at least a gain control input, a power input, and signal input and output terminals, said circuit including: power supply means having a positive terminal and a negative terminal; function generating means connected to said power supply means and including means connected between said power supply means and said gain control input of said amplifier stage, wherein said function generating means includes means for generating a wave linearly increasing from a value less than the potential of the positive terminal of said power supply up to the value of said potential, combining means having inputs and an output; means connected to said means for generating for providing a wave linearly decreasing from said potential to a value less than said potential, said means connected between said power supply means and said gain control input including first and second sets of series-connected resistors and diodes, each set including first and second subsets of resistors, each subset in a set having the same number of resistors and having a common connection at one end of said resistors, said common connections of said first subsets being respectively connected to positive and negative terminals of said power supply means, said common connections of said second subsets being connected respectively to said means for generating a wave linearly increasing and said means for generating a wave linearly decreasing, the opposite ends of said resistors in said subsets being connected in pairs, one from each first and second subset in a set, to one end of respective diodes, said first and second sets further including third and fourth subsets of resistors with one end of each of said resistors in said third and fourth subsets being connected to a respective opposite end of said diodes, the other ends of said resistors in said third subsets being connected in common to one input of said combining means and to bias means connected to the negative terminal of said power supply means, the other ends of said resistors of said fourth subset being connected to another input of said combining means, and the output of said combining means connected to said gain control input of said amplifier stage.
Claim 2
Dependent Claim 375 words
An electrical waveform control circuit employing a gain controlled amplifier stage wherein said stage has at least a gain control input, a power input, and signal input and output terminals, said circuit including: power supply means having a positive terminal and a negative terminal; function generating means connected to said power supply means and including means connected between said power supply means and said gain control input of said amplifier stage, wherein said function generating means includes means for generating a wave linearly increasing from a value less than the potential of the positive terminal of said power supply up to the value of said potential, combining means having inputs and an output; means connected to said means for generating for providing a wave linearly decreasing from said potential to a value less than said potential, said means connected between said power supply means and said gain control input including first and second sets of series-connected resistors and diodes, each set including first and second subsets of resistors, each subset in a set having the same number of resistors and having a common connection at one end of said resistors, said common connections of said first subsets being respectively connected to positive and negative terminals of said power supply means, said common connections of said second subsets being connected respectively to said means for generating a wave linearly increasing and said means for generating a wave linearly decreasing, the opposite ends of said resistors in said subsets being connected in pairs, one from each first and second subset in a set, to one end of respective diodes, said first and second sets further including third and fourth subsets of resistors with one end of each of said resistors in said third and fourth subsets being connected to a respective opposite end of said diodes, the other ends of said resistors in said third subsets being connected in common to one input of said combining means and to bias means connected to the negative terminal of said power supply means, the other ends of said resistors of said fourth subset being connected to another input of said combining means, and the output of said combining means connected to said gain control input of said amplifier stage.
Claim 3
Dependent Claim 17 words
The circuit as set forth in claim 1 wherein said diodes in said sets are oppositely poled.
Claim 4
Dependent Claim 16 words
The circuit as set forth in claim 2 wherein said combining means is a differential amplifier.

References Cited (Backward Citations)

US2899550A Cited
US2930987A Cited
US3368153A Cited
US3684968A Cited
US3714602A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-02-10 1978-08-12 1979-02-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-02-10 1982-08-12 1983-02-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-02-10 1986-08-12 1987-02-11 $7700.00 Window Closed / Lapsed

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