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US3865623A Expired / Lapsed US ⏱️ 0.0 years remaining

Fully additive process for manufacturing printed circuit boards

Assignee: Northrop Grumman Guidance and Electronics Co Inc
•
Filing: 1973-02-02
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Granted: 1975-02-11
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Expires: 1993-02-02
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Abstract

Abstract Commencing with a commercially available electrically insulative laminate, such as paper-epoxy or glass-epoxy material, a predesigned pattern of holes is formed between the front and back sides of a circuit board in any conventional manner. The laminate is then immersed in an organic solvent to render the finish on the ''''buttercoat'''' receptive to the subsequent acid etch, and then is water rinsed. This is followed by immersion in an acid solution, such as chromic acid, to chemically abraid the laminate surface. Next the laminate is rinsed in water and thereupon immersed in a caustic solution to neutralize any traces of acid remaining from the preceding step. The laminate is then rinsed in another acid solution, such as hydrochloric acid. Thereafter the laminate is immersed in a catalyst, such as a tin-palladium solution, which conditions the surfaces of the laminate for electroless copper plating and that step is followed by a water rinse. Next the laminate is immersed in an accelerator which activates the catalyst, such as by freeing the metal palladium ions on the laminate which subsequently accelerates future plating. And this is followed by a water rinse. At this time the laminate is dried. Thereafter a layer of electrically nonconductive thermosetting material is applied onto each side of the laminate in the negative facsimile of the conductor pattern desired to form a permanent selectively applied conformal coating. The laminate is placed in an air circulating oven for approximately 30 minutes at 250*F. to heat set or cure the conformal coating. Thereafter the board is immersed in an electroless copper plating solution for a period of time sufficient to plate copper to the desired thickness on the surfaces and to plate the surfaces of the holes to form throughhole connections between the laminate surfaces.

Inventors

  • 👤 Jr Herbert J Allen
  • 👤 Ronald Earl Todd
  • 👤 Sr Jerry Wayne Wegman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 15:54
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/38; H05K3/381; H05K3/10; H05K3/18; H05K3/181; H05K3/182; H05K3/184; H05K2203/00; H05K2203/07; H05K2203/0779; H05K2203/0783; H05K2203/0786; H05K2203/0789; H05K3/386; H05K3/387; H05K3/40; H05K3/42; H05K3/425; H05K3/426

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 366 words
A FULLY ADDITIVE PROCESS FOR MANUFACTURING CIRCUIT BOARDS HAVING PRINTED ELECTRICAL CONDUCTORS UPON THE TOP AND BOTTOM SIDES THEREOF AND ELECTRICALLY CONDUCTIVE THROUGH-HOLE CONNECTIONS THEREBETWEEN FROM A CONVENTIONAL BOARD MATERIAL OF THE GROUP CONSISTING OF GLASS-EPOXY, AND PAPER-EPOXY, AND PAPER PHENOLIC LAMINATES, HAVING A BUTTERCOAT, COMPRISING THE STEPS OF: FORMING A PLURALITY OF PASSAGES BETWEEN THE TOP AND BOTTOM SURFACES OF SAID BOARD IN A PREDETERMINED PATTERM; IMMERSING SAID CIRCUIT BOARD IN AN ORGANIC SOLVENT FOR RENDERING THE FINISH ON THE BUTTERCOAT RECEPTIVE TO AN ETCHANT ACID; RINSING SAID BOARD IN WATER FOR REMOVING SAID ORGANIC SOLVENT; IMMERSING SAID BOARD IN AN ACID BATH FOR CHEMICALLY ETCHING THE SURFACES THEREOF AND THE PASSAGES THERETHROUGH; RINSING SAID BOARD IN WATER; IMMERSING SAID BOARD IN A CAUSTIC SOLUTION FOR NEUTRALIZING ANY TRACES OF ACID REMAINING ON SAID BOARD; RINSING SAID BOARD IN AN ACID SOLUTION FOR NEUTRALIZING TRACES OF CAUSTIC SOLUTION REMAINING ON SAID BOARD AND GIVING SAID BOARD IN ACIDIC CHARACTER, IMMERSING SAID BOARD IN AN ACIDIC TIN-PALLADIUM CATALYST SOLUTION FOR CATALYZING THE SURFACES OF SAID BOARD; RINSING SAID BOARD IN WATER TO REMOVE EXCESS CATALYST; IMMERSING SAID BOARD IN A CATALYST ACCELERATOR SOLUTION WHEREBY METAL PALLADIUM IONS ARE FREED FROM THE CATALYTIC TIN-LALLADIUM SOLUTION FOR SUBSEQUENT ATTRACTION TO COPPER METAL; RINSING SAID BOARD IN WATER; DRYING SAID BOARD; APPLYING A MATERIAL TO THE TOP AND BOTTOM SURFACES OF SAID BOARD IN THE NEGATIVE FACSIMILE OF THE CONDUCTOR PATTERN TO BE PLACED UPON THE TOP AND BOTTOM SURFACES OF SAID BOARD, SAID COVERING MATERIAL WHICH IN ITS SET STATE RIGIDLY ELECTRICALLY INSULATIVE MATERIAL WHICH IN ITS SET STATE RIGIDLY ADHERES TO THE SURFACES OF SAID BOARD AND WITHSTANDS WITHOUT EFFECT IMMERSION IN AN ELECTROLESS COPPER PLATING SOLUTION FOR PERIODS OF APPROXIMATELY 5 HOURS; HEATING SAID BOARD FOR SETTING SAID THERMOSETTING MATERIAL; AND IMMERSING SAID BOARD IN AN ELECTROLESS COPPER PLATING SOLUTION FOR APPROXIMATELY 5 HOURS TO DEPOSIT COPPER ON THE PORTIONS OF THE SUBSTRATE UNCOVERED BY SAID THERMOSETTING MATERIAL, WHEREBY ELECTRICALLY CONDUCTIVE PATHS OF COPPER ARE FORMED ON THE SURFACES OF THE SUBSTRATE AND ON THE WALLS OF THE PASSAGES FORMED THROUGH THE SUBSTRATE WITHOUT THE NECESSITY OF ETCHING AWAY PLATED MATERIALS OR STRIPPING AWAY MASKING MATERIALS.
Claim 2
Dependent Claim 366 words
A FULLY ADDITIVE PROCESS FOR MANUFACTURING CIRCUIT BOARDS HAVING PRINTED ELECTRICAL CONDUCTORS UPON THE TOP AND BOTTOM SIDES THEREOF AND ELECTRICALLY CONDUCTIVE THROUGH-HOLE CONNECTIONS THEREBETWEEN FROM A CONVENTIONAL BOARD MATERIAL OF THE GROUP CONSISTING OF GLASS-EPOXY, AND PAPER-EPOXY, AND PAPER PHENOLIC LAMINATES, HAVING A BUTTERCOAT, COMPRISING THE STEPS OF: FORMING A PLURALITY OF PASSAGES BETWEEN THE TOP AND BOTTOM SURFACES OF SAID BOARD IN A PREDETERMINED PATTERM; IMMERSING SAID CIRCUIT BOARD IN AN ORGANIC SOLVENT FOR RENDERING THE FINISH ON THE BUTTERCOAT RECEPTIVE TO AN ETCHANT ACID; RINSING SAID BOARD IN WATER FOR REMOVING SAID ORGANIC SOLVENT; IMMERSING SAID BOARD IN AN ACID BATH FOR CHEMICALLY ETCHING THE SURFACES THEREOF AND THE PASSAGES THERETHROUGH; RINSING SAID BOARD IN WATER; IMMERSING SAID BOARD IN A CAUSTIC SOLUTION FOR NEUTRALIZING ANY TRACES OF ACID REMAINING ON SAID BOARD; RINSING SAID BOARD IN AN ACID SOLUTION FOR NEUTRALIZING TRACES OF CAUSTIC SOLUTION REMAINING ON SAID BOARD AND GIVING SAID BOARD IN ACIDIC CHARACTER, IMMERSING SAID BOARD IN AN ACIDIC TIN-PALLADIUM CATALYST SOLUTION FOR CATALYZING THE SURFACES OF SAID BOARD; RINSING SAID BOARD IN WATER TO REMOVE EXCESS CATALYST; IMMERSING SAID BOARD IN A CATALYST ACCELERATOR SOLUTION WHEREBY METAL PALLADIUM IONS ARE FREED FROM THE CATALYTIC TIN-LALLADIUM SOLUTION FOR SUBSEQUENT ATTRACTION TO COPPER METAL; RINSING SAID BOARD IN WATER; DRYING SAID BOARD; APPLYING A MATERIAL TO THE TOP AND BOTTOM SURFACES OF SAID BOARD IN THE NEGATIVE FACSIMILE OF THE CONDUCTOR PATTERN TO BE PLACED UPON THE TOP AND BOTTOM SURFACES OF SAID BOARD, SAID COVERING MATERIAL WHICH IN ITS SET STATE RIGIDLY ELECTRICALLY INSULATIVE MATERIAL WHICH IN ITS SET STATE RIGIDLY ADHERES TO THE SURFACES OF SAID BOARD AND WITHSTANDS WITHOUT EFFECT IMMERSION IN AN ELECTROLESS COPPER PLATING SOLUTION FOR PERIODS OF APPROXIMATELY 5 HOURS; HEATING SAID BOARD FOR SETTING SAID THERMOSETTING MATERIAL; AND IMMERSING SAID BOARD IN AN ELECTROLESS COPPER PLATING SOLUTION FOR APPROXIMATELY 5 HOURS TO DEPOSIT COPPER ON THE PORTIONS OF THE SUBSTRATE UNCOVERED BY SAID THERMOSETTING MATERIAL, WHEREBY ELECTRICALLY CONDUCTIVE PATHS OF COPPER ARE FORMED ON THE SURFACES OF THE SUBSTRATE AND ON THE WALLS OF THE PASSAGES FORMED THROUGH THE SUBSTRATE WITHOUT THE NECESSITY OF ETCHING AWAY PLATED MATERIALS OR STRIPPING AWAY MASKING MATERIALS.
Claim 3
Dependent Claim 441 words
An additive method of forming a configuration of electrically conductive paths upon the top and bottom surfaces of an insulating substrate in the group of glass-epoxy paper-epoxy and paper-phenolic laminate and through-hole conductive connections therebetween comprising the steps of: forming a predetermined plurality of holes through said insulating substrate material in a prearranged pattern; immersing said substrate in an organic solvent for between 3 to 10 minutes at 80* F., said solvent comprising di-methyl formamide; rinsing said substrate in water; immersing said substrate in a chromic acid solution of specific gravity 1.3 to 1.4 for approximately 5 minutes at a temperature of 150* F.; rinsing said substrate in water; immersing said substrate in a sodium hydroxide solution of pH factor 12.3 at a temperature of 120* F. for approximately 3 minutes to neutralize the chromic acid traces remaining on said substrate; rinsing said substrate in a hydrochloric acid solution, 20 percent by volume, for 30 seconds to 1 minute to eliminate any traces of the sodium hydroxide remaining from the previous step and to render any trace solution on the substrate acidic in nature; immersing said substrate in a solution comprising colloidal palladium having a protective stannic acid colloid in hydrochloric acid for 2 minutes at ambient temperature to condition the surface of said board; rinsing said substrate in water; immersing said substrate in an accelerator whereby freeing palladium in ionic form to deposit colloidal palladium upon the surface of the board for attraction to copper metal; rinsing said substrate in water; drying the laminate; applying a negative facsimile of the desired conductor configuration on the top and bottom surfaces of said substrate with an electrically insulative thermosetting material in its unset state, said material being having a characteristic which in its set state is capable of withstanding immersion in an electroless copper plating solution for a period of approximately 5 hours without decomposition and without receiving a copper plating, and comprising a synthetic ester resin, said facsimile leaving exposed patterns on said substrate wherein it is desired to provide electrically conductive paths; heating said substrate to set said thermosetting material and provide a solid adherent permanent electrically insulating covering over the desired portions of said substrate; immersing said substrate in an electroless copper plating solution at a tempeRature of 120* F. for a period of approximately 5 hours to deposit copper on the portions of the substrate uncovered by said thermosetting material, whereby electrically conductive paths of copper are formed on the surfaces of the substrate and on the walls of the passages formed through the substrate without the necessity of etching away plated materials or stripping away masking materials.
Claim 4
Dependent Claim 441 words
An additive method of forming a configuration of electrically conductive paths upon the top and bottom surfaces of an insulating substrate in the group of glass-epoxy paper-epoxy and paper-phenolic laminate and through-hole conductive connections therebetween comprising the steps of: forming a predetermined plurality of holes through said insulating substrate material in a prearranged pattern; immersing said substrate in an organic solvent for between 3 to 10 minutes at 80* F., said solvent comprising di-methyl formamide; rinsing said substrate in water; immersing said substrate in a chromic acid solution of specific gravity 1.3 to 1.4 for approximately 5 minutes at a temperature of 150* F.; rinsing said substrate in water; immersing said substrate in a sodium hydroxide solution of pH factor 12.3 at a temperature of 120* F. for approximately 3 minutes to neutralize the chromic acid traces remaining on said substrate; rinsing said substrate in a hydrochloric acid solution, 20 percent by volume, for 30 seconds to 1 minute to eliminate any traces of the sodium hydroxide remaining from the previous step and to render any trace solution on the substrate acidic in nature; immersing said substrate in a solution comprising colloidal palladium having a protective stannic acid colloid in hydrochloric acid for 2 minutes at ambient temperature to condition the surface of said board; rinsing said substrate in water; immersing said substrate in an accelerator whereby freeing palladium in ionic form to deposit colloidal palladium upon the surface of the board for attraction to copper metal; rinsing said substrate in water; drying the laminate; applying a negative facsimile of the desired conductor configuration on the top and bottom surfaces of said substrate with an electrically insulative thermosetting material in its unset state, said material being having a characteristic which in its set state is capable of withstanding immersion in an electroless copper plating solution for a period of approximately 5 hours without decomposition and without receiving a copper plating, and comprising a synthetic ester resin, said facsimile leaving exposed patterns on said substrate wherein it is desired to provide electrically conductive paths; heating said substrate to set said thermosetting material and provide a solid adherent permanent electrically insulating covering over the desired portions of said substrate; immersing said substrate in an electroless copper plating solution at a tempeRature of 120* F. for a period of approximately 5 hours to deposit copper on the portions of the substrate uncovered by said thermosetting material, whereby electrically conductive paths of copper are formed on the surfaces of the substrate and on the walls of the passages formed through the substrate without the necessity of etching away plated materials or stripping away masking materials.

References Cited (Backward Citations)

US3146125A Cited
US3600330A Cited
US3573973A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-02-10 1978-08-12 1979-02-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-02-10 1982-08-12 1983-02-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-02-10 1986-08-12 1987-02-11 $7700.00 Window Closed / Lapsed

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