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US3863333A Expired / Lapsed US ⏱️ 0.0 years remaining

Methods for making semiconductor devices

Assignee: AT&T Inc
•
Filing: 1973-08-31
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Granted: 1975-02-04
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Expires: 1993-08-31
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Abstract

Abstract Ultrasonic agitation in a liquid is used in two ways in the fabrication of small semiconductor diodes. First, a siliconcontaining metal layer such as platinum-silicide is removed by exposing it to a silicon etchant and then ultrasonically agitating it. Second, an array of diodes connected by a gold film back contact is separated into individual devices by ultrasonically agitating the array to break up the gold film.

Inventors

  • 👤 Andrew Loya

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 17:16
CPC Classifications
H; H10; H10P; H10P95/00; B; B01; B01J; B01J19/00; B01J19/08; B01J19/10; H10D; H10D99/00

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 148 words
A PROCESS FOR MAKING SEMICONDUCTOR DEVICES COMPRISING THE STEPS OF: FORMING A FIRST THIN LAYER OF GOLD ON ONE SIDE OF A SILICON WAFER; FORMING A PLATINUM-SILICIDE LAYER ON THE OTHER SIDE OF THE WAFER; FORMING A SECOND LAYER OF GOLD OVER THE PLATINUM-SILICIDE LAYER; DEFINING A PLURALITY OF DEVICES BY ETCHING PORIONS OF THE SECOND GOLD LAYER, THEREBY TO EXPOSE PART OF THE PLATNIUMSILICIDE LAYER; SUBJECTING THE EXPOSED PLATINUM-SILICIDE LAYER TO A SILICON ETCHANT, THEREBY TO WEAKEN ITS STRUCTURE; IMMERSING THE WAFER IN A LIQUID AND SUBJECTING IT TO ULTRASONIC AGITATION OF SUFFICIENT INTENSITY TO REMOVE THE EXPOSED AND WEAKENED PLATINUM-SILICIDE, THEREBY TO EXPOSE PART OF THE SILICON WAFER; SUBJECTING THE EXPOSED SILICON TO A SILICON ETCH FOR A SUFFICIENT TIME TO ETCH THROUGH THE WAFER TO THE FIRST THIN LAYER OF GOLD, WHEREBY A PLURALITY OF DEFINED DEVICES ARE HELD TOGETHER BY THE FIRST LAYER; AND
Claim 2
Dependent Claim 148 words
A PROCESS FOR MAKING SEMICONDUCTOR DEVICES COMPRISING THE STEPS OF: FORMING A FIRST THIN LAYER OF GOLD ON ONE SIDE OF A SILICON WAFER; FORMING A PLATINUM-SILICIDE LAYER ON THE OTHER SIDE OF THE WAFER; FORMING A SECOND LAYER OF GOLD OVER THE PLATINUM-SILICIDE LAYER; DEFINING A PLURALITY OF DEVICES BY ETCHING PORIONS OF THE SECOND GOLD LAYER, THEREBY TO EXPOSE PART OF THE PLATNIUMSILICIDE LAYER; SUBJECTING THE EXPOSED PLATINUM-SILICIDE LAYER TO A SILICON ETCHANT, THEREBY TO WEAKEN ITS STRUCTURE; IMMERSING THE WAFER IN A LIQUID AND SUBJECTING IT TO ULTRASONIC AGITATION OF SUFFICIENT INTENSITY TO REMOVE THE EXPOSED AND WEAKENED PLATINUM-SILICIDE, THEREBY TO EXPOSE PART OF THE SILICON WAFER; SUBJECTING THE EXPOSED SILICON TO A SILICON ETCH FOR A SUFFICIENT TIME TO ETCH THROUGH THE WAFER TO THE FIRST THIN LAYER OF GOLD, WHEREBY A PLURALITY OF DEFINED DEVICES ARE HELD TOGETHER BY THE FIRST LAYER; AND
Claim 3
Dependent Claim 24 words
The process of claim 1 wherein: the first thin layer of gold has a thickness of the order of between 2,000 and 10,000 angstroms.
Claim 4
Dependent Claim 21 words
The process of claim 2 wherein: the platinum-silicide layer has a thickness on the order of from 500 to 2,000 angstroms.
Claim 5
Dependent Claim 17 words
The process of claim 3 wherein: the thickness of the semiconductor is less than about 40 micrometers.
Claim 6
Dependent Claim 27 words
The process of claim 4 wherein: the step of defining the devices comprises the step of: defining devices that have diameters of less than about 10 mils.
Claim 7
Dependent Claim 96 words
A process for making semiconductor devices comprising the steps of: forming a first silicon-containing conductive metal layer on one surface of a silicon wafer; forming a second metal layer over the first metal layer; etching parts of the second metal layer, thereby to expose parts of the first metal layer; exposing the first metal layer to a silicon etch thereby to weaken its structure; immersing the wafer in a liquid and subjecting it to ultrasonic agitation of a sufficient intensity to remove the exposed weakened first metal layer, thereby exposing part of the first silicon wafer.
Claim 8
Dependent Claim 96 words
A process for making semiconductor devices comprising the steps of: forming a first silicon-containing conductive metal layer on one surface of a silicon wafer; forming a second metal layer over the first metal layer; etching parts of the second metal layer, thereby to expose parts of the first metal layer; exposing the first metal layer to a silicon etch thereby to weaken its structure; immersing the wafer in a liquid and subjecting it to ultrasonic agitation of a sufficient intensity to remove the exposed weakened first metal layer, thereby exposing part of the first silicon wafer.
Claim 9
Dependent Claim 11 words
The process of claim 6 wherein: the first metal is platinum-silicide.
Claim 10
Dependent Claim 13 words
The process of claim 6 wherein: the first metal is gold-silicon eutectic alloy.
Claim 11
Dependent Claim 19 words
The process of claim 6 wherein: the thickness of the first metal layer is approximately 500 to 5,000 angstroms.
Claim 12
Dependent Claim 10 words
The process of claim 6 wherein: the etchant is HNO3:HF.
Claim 13
Dependent Claim 28 words
The process of claim 9 wherein: the exposing step comprises the step of immersing the first metal layer in a 20:1 solution of HNO3:HF for about 1 minute.
Claim 14
Dependent Claim 39 words
The process of claim 6 wherein: the first layer has a thickness of approximately 600 angstroms; and the exposing step comprises the step of immersing the first metal layer in a 20:1 solution of HNO3:HF for approximately 50 seconds.
Claim 15
Dependent Claim 40 words
The process of claim 6 wherein: the first layer has a thickness of approximately 2,000 angstroms; and the exposing step comprises the step of immersing the first layer in a 20:1 solution of HNO3:HF for approximately 70 - 75 seconds.

References Cited (Backward Citations)

US3112850A Cited
US3291640A Cited
US3411999A Cited
US3384279A Cited
US3795045A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-02-03 1978-08-05 1979-02-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-02-03 1982-08-05 1983-02-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-02-03 1986-08-05 1987-02-04 $7700.00 Window Closed / Lapsed

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