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Method of making a transistor having an improved safe operating area

Assignee: Individual
•
Filing: 1973-12-03
•
Granted: 1975-01-14
•
Expires: 1993-12-03
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Abstract

Abstract A transistor having an emitter and base with contact surfaces lying substantially in the same plane and having an increased safe operating area is disclosed. It has an increased wattage rating without increasing the size of the transistor, achieved by providing a distributed pinch resistance in the base area between the emitter-base junction and the base ohmic contact of the transistor, the pinch resistor being formed by a diffusion of the same conductivity type as the emitter in the indicated base region.

Inventors

  • 👤 Richard O Olson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 12:36
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/177; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H10D84/615; H10D99/00

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 98 words
A METHOD OF MAKING A TRANSISTOR DEVICE COMPRISING THE FOLLOWING STEPS: A. PROVIDING A COLLECTOR OF ONE CONDUCTIVITY TYPE. B. FORMING A BASE REGION OF THE OPPOSITE CONDUCTIVITY TYPE, ON SAID COLLECTOR, C. DIFFUSING AN EMMITER INTO SAID BASE TO FORM A JUNCTION THEREWITH, THE SURFACES OF SAID EMMITER AND BASE BEING IN A COMMON PLANE, D. FORMING OHMIC CONTACT METALLIZATIONS OVER EACH OF SAID EMMITER AND BASE, E. FORMING AN ISOLATION LAYER OVER SAID JUNCTION AND BETWEEN SAID OHMIC METALLIZATIONS, AND F. FORMING A PINCH RESISTOR IN THE BASE BETWEEN SAID BASE OHMIC METALLIZATION AND SAID EMMITER.
Claim 2
Independent Claim 98 words
A METHOD OF MAKING A TRANSISTOR DEVICE COMPRISING THE FOLLOWING STEPS: A. PROVIDING A COLLECTOR OF ONE CONDUCTIVITY TYPE. B. FORMING A BASE REGION OF THE OPPOSITE CONDUCTIVITY TYPE, ON SAID COLLECTOR, C. DIFFUSING AN EMMITER INTO SAID BASE TO FORM A JUNCTION THEREWITH, THE SURFACES OF SAID EMMITER AND BASE BEING IN A COMMON PLANE, D. FORMING OHMIC CONTACT METALLIZATIONS OVER EACH OF SAID EMMITER AND BASE, E. FORMING AN ISOLATION LAYER OVER SAID JUNCTION AND BETWEEN SAID OHMIC METALLIZATIONS, AND F. FORMING A PINCH RESISTOR IN THE BASE BETWEEN SAID BASE OHMIC METALLIZATION AND SAID EMMITER.
Claim 3
Dependent Claim 24 words
The method according to claim 1 wherein said forming a pinch resistor comprises diffusing a region of the same conductivity type as said emitter.
Claim 4
Dependent Claim 20 words
The method according to claim 2 wherein said pinch resistor diffusion is formed at the same time as said emitter.
Claim 5
Dependent Claim 15 words
The method according to claim 2 wherein said pinch resistor diffusion comprises an N+ diffusion.
Claim 6
Dependent Claim 15 words
The method according to claim 2 wherein said pinch resistor diffusion comprises a P+ diffusion.

References Cited (Backward Citations)

US3341755A Cited
US3414782A Cited
US3483464A Cited
US3629667A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-01-13 1978-07-15 1979-01-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-01-13 1982-07-15 1983-01-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-01-13 1986-07-15 1987-01-14 $7700.00 Window Closed / Lapsed

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