Control system for transfer of key input data in table-type electronic computer

Claim 2

A control system for transfer of input data in a table-type computer comprising: a key input section for entering input data into the computer; an arithmetic unit for performing arithmetic operations on said input data and for providing results of said operations; a printer for recording results provided by the arithmetic means; and a buffer section comprising: a. a plurality of series connected recirculating dynamic shift registers connected between said key input section and said arithmetic unit, with the first shift register of the series connected to the key input section and the last shift register of the series connected to the arithmetic unit; b. a plurality of self-holding circuits connected in a one-toone correspondence with said plurality of shift registers, each self-holding circuit providing a first output signal while input data are stored in its corresponding shift register and a second input signal while its corresponding shift register is empty; and c. control means including a plurality of gate means interposed between the key input section and the first register, between adjacent registers, and between the self-holding circuits and the registers, said control means responsive to said first and second output signals from the self-holding circuits to control said gate means to transfer input data from the key input section into the first register only when said first register is empty, and to transfer input data from each register into the succeeding register in the series when said succeeding register is empty but to recirculate the data in each register whose succeeding register is not empty.

Claim 3

A control system as in claim 1 wherein the arithmetic unit and the printer are interconnected and at least one of said arithmetic unit and printer has means for providing a busy signal, and the control means includes gate means interposed between the last register and the arithmetic unit and is responsive to said busy signal to prevent the transfer of data from the last register into the arithmetic sEction for the duration of said busy signal.

Claim 4

A control system as in claim 2 wherein said busy signal is provided only while the printer is in the process of recording said results.

Claim 5

A control system as in claim 1 including means connected to the self-holding circuit associated with the first shift register and to the key entry section for providing an error signal when all shift registers, including the first shift register, are storing input data and the key input section provides data for entry into the first register.

Claim 6

A control system as in claim 1 wherein each of said plurality of said self-holding circuits comprises a flip-flop which is set when input data are stored in its corresponding shift register and is reset when no input data are stored in its corresponding shift register.

Claim 7

A control system for transfer of input data in a table-type computer comprising: a key input section for entering input data into the computer; an arithmetic unit for performing arithmetic operations on said input data and for providing results thereof; a printer for recording said results; means for providing a busy signal while selected operations of at least one of said arithmetic unit and printer are taking place and a not busy signal while said selected operations are not taking place; and a buffer section comprising: a. a plurality of series connected circulating dynamic shift registers connected between said key input section and said arithmetic unit; b. a plurality of self-holding circuits connected in a one-to-one correspondence with said plurality of shift registers, each self-holding circuit providing a first output signal when input data are stored in its corresponding shift register and providing a second output signal when no input data are stored in its corresponding shift register; and c. control means including a plurality of first gates connected in a one-to-one correspondence with each shift register and each self-holding circuit, each of said first gates allowing the storing of input data in its shift register only when the corresponding self-holding circuit is providing the second output signal, a plurality of second gates connected in a one-to-one correspondence to each shift register and each self-holding circuit, each of said second gates causing the recirculation of the input data in its shift register when the corresponding self-holding circuit is providing said first output signal, and a third gate interconnected between the last shift register of the series and the arithmetic unit and connected to the means for providing said busy and not busy signal to allow transfer of input data from the last shift register to the arithmetic unit only when the not busy signal is being provided.

Claim 8

A control system for transfer of input data in a table-type computer comprising: a key input section for entering input data into the computer; an arithmetic unit for performing arithmetic operations on said input data and for providing results thereof; a printer for recording said results; means for providing a busy signal while selected operations of at least one of said arithmetic unit and printer are taking place and a not busy signal while said selected operations are not taking place; and a buffer section comprising: a. a plurality of series connected circulating dynamic shift registers connected between said key input section and said arithmetic unit; b. a plurality of self-holding circuits connected in a one-to-one correspondence with said plurality of shift registers, each self-holding circuit providing a first output signal when input data are stored in its corresponding shift register and providing a second output signal when no input data are stored in its corresponding shift register; and c. control means including a plurality of first gates connected in a one-to-one correspondence with each shift register and each self-holding circuit, each of said first gates allowing the storing of input data in its shift register only when the corresponding self-holding circuit is providing the second output signal, a plurality of second gates connected in a one-to-one correspondence to each shift register and each self-holding circuit, each of said second gates causing the recirculation of the input data in its shift register when the corresponding self-holding circuit is providing said first output signal, and a third gate interconnected between the last shift register of the series and the arithmetic unit and connected to the means for providing said busy and not busy signal to allow transfer of input data from the last shift register to the arithmetic unit only when the not busy signal is being provided.

Claim 9

A control system as in claim 6 including a fourth gate connected to the key entry section and to the self-holding circuit corresponding to the first shift register to provide an error signal when input data is provided from the key entry section while the last recited self-holding circuit is providing said first output signal.

Claim 10

A control system as in claim 6 wherein the busy signal is provided only while the printer is in the process of recording the results provided thereto from the arithmetic unit.