High speed driver circuit

Claim 1

A high speed driver circuit comprising: input circuit means for receiving an input pulse signal; means providing a source of first and second reference potentials; first switch means coupled to said input circuit means and repsonsive to first and second pre-determined amplitude levels of said pulse signal for respectively assuming a first and second operating state; second and third switch means each including a transistor having base, emitter, and collector electrodes, having a common output terminal and each responsive to the operating state of said first switch mEans for selectively providing a circuit path coupling to one or the other of said reference potentials in dependence on the operating state of said first switch means; output circuit means coupled to said common output terminal and responsive to the switiched circuit path coupling of said second and third switch means for providing an output pulse signal corresponding to said received input signal; and means providing a signal feedback path between said input and output circuit means; the emitter electrodes of said transistors being respectively coupled to a separate one of said first and second reference potentials, and the collector electrodes being connected together and coupled to said output circuit means, said second and third switch means transistors being biased to operate as switches and selectively provide a conductive path from said output circuit means to said first or second reference potentials in response to whether said first switch means is in its first or second operating state.