Circuit, such as cmos crystal oscillator, with reduced power consumption

Claim 2

An oscillator comprising, in combination: first and second controllable impedance means; two operating voltage terminals; an input terminal; an output terminal; first and second semiconductor devices of different conductivity types, each having a conduction path and a control electrode for controlling the conductivity of its conduction path, both control electrodes connected to said input terminal, the conduction path of said first device connected in series with said first controllable impedance means between said output terminal and one operating voltage terminal and the conduction path of said second device connected in series with said second controllable impedance means between said output terminal and the other operating voltage terminal; a regenerative feedback path connected between said output terminal and said input terminal; and second and third feedback paths, the second coupled between said first device and said second controllable impedance means and the third coupled between said second device and said first controllable impedance means.

Claim 3

An oscillator comprising, in combination: first and second controllable impedance means; two operating voltage terminals; an input terminal; an output terminal; first and second semiconductor devices of different conductivity types, each having a conduction path and a control electrode for controlling the conductivity of its conduction path, both control electrodes connected to said input terminal, the conduction path of said first device connected in series with said first controllable impedance means between said output terminal and one operating voltage terminal and the conduction path of said second device connected in series with said second controllable impedance means between said output terminal and the other operating voltage terminal; a regenerative feedback path connected between said output terminal and said input terminal; and second and third feedback paths, the second coupled between said first device and said second controllable impedance means and the third coupled between said second device and said first controllable impedance means.

Claim 4

An oscillator comprising, in combination: first and second controllable impedance means; two operating voltage terminals; an input terminal; an output terminal; first and second semiconductor devices of different conductivity types, each having a conduction path and a control electrode for controlling the conductivity of its conduction path, both control electrodes connected to said input terminal, the conduction path of said first device connected in series with said first controllable impedance means between said output terminal and one operating voltage terminal and the conduction path of said second device connected in series with said second controllable impedance means between said output terminal and the other operating voltage terminal; a regenerative feedback path connected between said output terminal and said input terminal; and second and third feedback paths, the second coupled between said first device and said second controllable impedance means and the third coupled between said second device and said first controllable impedance means.

Claim 5

An oscillator as set forth in claim 1 wherein said first and second controllable impedance means comprise third and fourth semiconductor devices, each having a conduction path and a control electrode for controlling the conductivity of its path, said third device of the same conductivity as the first device and the conduction path of said third device connected in series with that of said first device, said fourth device of the same conductivity type as said second device and the conduction path of said fourth device connected in series with that of said second device, said second feedback path connected to the control electrode of said fourth device and said third feedback path connected to the control electrode of said third device.

Claim 6

In an oscillator as set forth in claim 1, said regenerative feedback path including a crystal for controlling the frequency of said oscillator.

Claim 7

An oscillator as set forth in claim 1, wherein said first and second semiconductor devices comprise P and N type metal oxide semiconductor devices, respectively.

Claim 8

An oscillator as set forth in claim 1, further including first resistive means in series with the conduction path of said first device and second resistive means in series with the conduction path of said second device.

Claim 9

In an oscillator as set forth in claim 1, said first device comprising a P type device and said second device an N type device, each device having a source electrode at one end of its conduction path and a drain electrode at the other end of its conduction path, said second feedback path being connected at one end to the source electrode of said P type device and said third feedback path being connected at one end to the source electrode of said N type device.

Claim 10

An oscillator comprising, in combination: two controllable impedance means; two operating voltage terminals; an output terminal; an input terminal; two semiconductor devices of different conductivity types, each having a conduction path and a control electrode for controlling the conductivity of its conduction path, both control electrodes connected to said input terminal, the conduction path of one device connected in series with one controllable impedance means between said output terminal and one operating voltAge terminal and the conduction path of the other device connected in series with the other controllable impedance means between said output terminal and the other operating voltage terminal; a regenerative feedback path connected between said output terminal and said input terminal; means responsive to increased current flow through one device for increasing the impedance of the controllable impedance means in series with the conduction path of the other device; and means responsive to increased current flow through the other device for increasing the impedance of the controllable impedance means in series with the conduction path of said one device.

Claim 11

An oscillator comprising, in combination: two controllable impedance means; two operating voltage terminals; an output terminal; an input terminal; two semiconductor devices of different conductivity types, each having a conduction path and a control electrode for controlling the conductivity of its conduction path, both control electrodes connected to said input terminal, the conduction path of one device connected in series with one controllable impedance means between said output terminal and one operating voltAge terminal and the conduction path of the other device connected in series with the other controllable impedance means between said output terminal and the other operating voltage terminal; a regenerative feedback path connected between said output terminal and said input terminal; means responsive to increased current flow through one device for increasing the impedance of the controllable impedance means in series with the conduction path of the other device; and means responsive to increased current flow through the other device for increasing the impedance of the controllable impedance means in series with the conduction path of said one device.

Claim 12

A COS/MOS oscillator comprising, in combination: first and second operating voltage terminals; an input terminal and an output terminal; four MOS transistors, the first and second of P type and the third and fourth of N type, each having a conduction path and a control electrode, the control electrode of the second and third transistors connected to said input terminal, the conduction paths of the P type transistors connected in series between said output terminal and said first operating voltage terminal and the conduction paths of the N type transistors connected in series between said output terminal and said second operating voltage terminal; a regenerative feedback path connected between said output and input terminals; a feedback connection responsive to current flow through the P type transistors connected to the control electrode of said fourth transistor; and a feedback connection responsive to current flow through said N type transistors connected to the control electrode of said first transistor.

Claim 13

A COS/MOS oscillator comprising, in combination: first and second operating voltage terminals; an input terminal and an output terminal; four MOS transistors, the first and second of P type and the third and fourth of N type, each having a conduction path and a control electrode, the control electrode of the second and third transistors connected to said input terminal, the conduction paths of the P type transistors connected in series between said output terminal and said first operating voltage terminal and the conduction paths of the N type transistors connected in series between said output terminal and said second operating voltage terminal; a regenerative feedback path connected between said output and input terminals; a feedback connection responsive to current flow through the P type transistors connected to the control electrode of said fourth transistor; and a feedback connection responsive to current flow through said N type transistors connected to the control electrode of said first transistor.

Claim 14

A COS/MOS oscillator as set forth in claim 8 wherein said regenerative feedback path includes a crystal for controlling the frequency of said oscillator.

Claim 15

A COS/MOS oscillator as set forth in claim 9 further including two resistor means, one in series with the conduction paths of the P type transistors and the other in series with the conduction paths of the N type transistor.

Claim 16

A COS/MOS oscillator as set forth in claim 10, one said resistor means being connected between the conduction paths of the P type transistors and the other resistor means being connected between the conduction paths of the N type transistors.

Claim 17

A COS/MOS oscillator as set forth in claim 10, one of said resistor means being connected between said one operating voltage terminal and the conduction paths of said P type transistors and the other resistor means being connected between the other operating voltage terminal and the conduction paths of said N type transistors.

Claim 18

A COS/MOS oscillator as set forth in claim 8 wherein one feedback connection is connected between the two P type transistors and senses current flow by sensing the voltage across one of said P type transistors and wherein the other feedback connection is connected between the two N type transistors and senses current flow by sensing the voltage across one of said N type transistors.

Claim 19

An oscillator comprising, in combination: two controllable impedance means; two operating voltage terminals; an output terminal; an input terminal; two semiconductor devices of different conductivity types, each having a conduction path and a control electrode for controlling the conductivity of its conduction path, both control electrodes connected to said input terminal, the conduction path of one device connected in series with one controllable impedance means between said output terminal and one operating voltage terminal and the conduction path of the other device connected in series with the other controllable impedance means between said output terminal and the other operating voltage terminal; a regenerative feedback path connected between said output terminal and said input terminal; means responsive to the tendency for increased current flow through one device for controlling the impedance of the controllable impedance means in series with the conduction path of said one device; and means responsive to the tendency for increased current flow through the other device for controlling the impedance of the controllable impedance means in series with the conduction path of said other device.

Claim 20

An oscillator comprising, in combination: two controllable impedance means; two operating voltage terminals; an output terminal; an input terminal; two semiconductor devices of different conductivity types, each having a conduction path and a control electrode for controlling the conductivity of its conduction path, both control electrodes connected to said input terminal, the conduction path of one device connected in series with one controllable impedance means between said output terminal and one operating voltage terminal and the conduction path of the other device connected in series with the other controllable impedance means between said output terminal and the other operating voltage terminal; a regenerative feedback path connected between said output terminal and said input terminal; means responsive to the tendency for increased current flow through one device for controlling the impedance of the controllable impedance means in series with the conduction path of said one device; and means responsive to the tendency for increased current flow through the other device for controlling the impedance of the controllable impedance means in series with the conduction path of said other device.

Claim 21

An oscillator as set forth in claim 14 wherein said two semiconductor devices comprise P and N type MOS transistors, respectively.

Claim 22

An oscillator as set forth in claim 15 wherein said two controllable impedance means also comprise P and N type MOS transistors, respectively, the conduction paths of the two P type transistors being connected in series between said output terminal and the one operating voltage terminal.

Claim 23

An oscillator as set forth in claim 16 wherein said two means responsive to the tendency for increased current flow comprise a feedback connection from a point in the circuit between said two P type transistors to the control electrode of said N type transistor operating as a controllable impedance means and a second feedback connection from a point in the circuit between said two N type transistors to the control electrode of the P type transistor operating as a controllable impedance means.

Claim 24

An oscillator comprising, in combination: first and second operating voltage terminals; an input terminal; an output terminal; first and second semiconductor devices of different conductivity types, each having a conduction channel and a control electrode for controlling the conductivity of its conduction channel, both control electrodes connected to said input terminal, a first path between said output terminal and said first operating voltage terminal, said path including the conduction channel of said first device; a second path between said output terminal and said second operating voltage terminal, said second path including the conduction channel of said second device; a regenerative feedback path connected between said output terminal and said input terminal; means responsive to the tendency for current flow through said first path to increase for increasing the impedance of said second path; and means responsive to the tendency for current flow through said second path to increase for increasing the impedance of said first path.

Claim 25

An oscillator comprising, in combination: first and second operating voltage terminals; an input terminal; an output terminal; first and second semiconductor devices of different conductivity types, each having a conduction channel and a control electrode for controlling the conductivity of its conduction channel, both control electrodes connected to said input terminal, a first path between said output terminal and said first operating voltage terminal, said path including the conduction channel of said first device; a second path between said output terminal and said second operating voltage terminal, said second path including the conduction channel of said second device; a regenerative feedback path connected between said output terminal and said input terminal; means responsive to the tendency for current flow through said first path to increase for increasing the impedance of said second path; and means responsive to the tendency for current flow through said second path to increase for increasing the impedance of said first path.

Claim 26

An oscillator comprising, in combination: first and second operating voltage terminals; an input terminal; an output terminal; first and second semiconductor devices of different conductivity types, each having a conduction channel and a control electrode for controlling the conductivity of its conduction channel, both control electrodes connected to said input terminal, a first path between said output terminal and said first operating voltage terminal, said path including the conduction channel of said first device; a second path between said output terminal and said second operating voltage terminal, said second path including the conduction channel of said second device; a regenerative feedback path connected between said output terminal and said input terminal; means responsive to increased current flow in said first path and decreased current flow in said second path for applying regenerative feedback from said first to said second path; and means responsive to increased current flow in said second path and decreased current flow in said first path for applying regenerative feedback from said second to said first path.

Claim 27

An oscillator comprising, in combination: first and second operating voltage terminals; an input terminal; an output terminal; first and second semiconductor devices of different conductivity types, each having a conduction channel and a control electrode for controlling the conductivity of its conduction channel, both control electrodes connected to said input terminal, a first path between said output terminal and said first operating voltage terminal, said path including the conduction channel of said first device; a second path between said output terminal and said second operating voltage terminal, said second path including the conduction channel of said second device; a regenerative feedback path connected between said output terminal and said input terminal; means responsive to increased current flow in said first path and decreased current flow in said second path for applying regenerative feedback from said first to said second path; and means responsive to increased current flow in said second path and decreased current flow in said first path for applying regenerative feedback from said second to said first path.

Claim 28

The combination as set forth in claim 20 wherein said first and second controllable impedance means comprise third and fourth semiconductor devices, each having a conduction path and a controll electrode for controlling the conductivity of its path, said third device of the same conductivity as the first device and the conduction path of said third device connected in series with that of said first device, said fourth device of the same conductivity type as said second device and the conduction path of said fourth device connected in series with that of said second device, said first feedback path connected to the control electrode of said fourth device and said second feedback path connected to the control electrode of said third device.

Claim 29

The combination as set fourth in claim 20, wherein said first and second semiconductor devices comprise P and N type metal oxide semiconductor devices, respectively.

Claim 30

In the combination as set forth in claim 20, said first device comprising a P type device and said second device an N type device, each device having a source electrode at one end of its conduction path and a drain electrode at the other end of its conduction path, said first feedback path being connected at one end to the source electrode of said P type device and said second feedback path being connected at one end to the source electrode of said N type device.

Claim 31

A COS/MOS circuit comprising, in combination: first and second operating voltage terminals; an input terminal and an output terminal; four MOS transistors, the first and second of P type and the third and fourth of N type, each having a conduction path and a control electrode, the control electrode of the second and third transistors connected to said input terminal, the conduction paths of the P type transistors connected in series between said output terminal and said first operating voltage terminal and the conduction paths of the N type transistors connected in series between said output terminal and said second operating voltage terminal; a feedback connection responsive to current flow through the P type transistors connected to the control electrode of said fourth transistor; and a feedback connection responsive to current flow through said N type transistors connected to the control electrode of said first transistor.

Claim 32

A COS/MOS circuit comprising, in combination: first and second operating voltage terminals; an input terminal and an output terminal; four MOS transistors, the first and second of P type and the third and fourth of N type, each having a conduction path and a control electrode, the control electrode of the second and third transistors connected to said input terminal, the conduction paths of the P type transistors connected in series between said output terminal and said first operating voltage terminal and the conduction paths of the N type transistors connected in series between said output terminal and said second operating voltage terminal; a feedback connection responsive to current flow through the P type transistors connected to the control electrode of said fourth transistor; and a feedback connection responsive to current flow through said N type transistors connected to the control electrode of said first transistor.

Claim 33

A COS/MOS circuit as set forth in claim 24, further including two resistor means, one in series with the conduction paths of the P type transistors and the other in series with the conduction paths of the N type transistors.

Claim 34

A COS/MOS circuit as set forth in claim 24 wherein one feedback connection is connected between the two P type transistors and senses current flow by sensing the voltage across one of said P type transistors and wherein the other feedback connection is connected between the two N type transistors and senses current flow by sensing the voltage across one of said N type transistors.