GaN SWITCHING AND MEMORY DEVICES AND METHODS THEREFOR

Claim 2

A NON-VOLAILE MEMORY COMPRISING A HETEROJUNCTION DEVICE HAING A FIRST REGION OF CRYSTALLINE SILICON OF ONE CONDUCTIVITY TYPE; AND A SECOND REGION OF CRYSTALLINE GAN FORMING A JUNCTION WITH SAID FIRST REGION, SAID GAN CONTAINING A HIGH DENSITY OF MATERIAL IMPERFERCTIONS INCLUDING DEEP ENERGY TRAPS EXISTING AT DENSITIES GREATER THAN APPROXIMATELY 10**18 CM**-3 WITH SAID TRAPS INCLUDING DOUBLE OR MORE ACCEPTOR-LIKE TRAPS IN THE BULK OF SAID GAN AND DONOR-LIKE TRAPS IN THE VICINITY OF SAID JUNCTION SO AS TO FORM A MEMORY THAT EXHIBITS A NON-VOLATILE HIGH IMPEDEANCE STATE AND A NON-VOLATILE LOW IMPEDANCE STATE WITH BOTH HIGH IMPEDANCE STATE AND

Claim 3

The memory as set forth in claimm 1 wherein said GaN is sputtered GaN of high resistivity.

Claim 4

The memory as set forth in claim 1 wherein said GaN has a thickness of 500 angstroms to 10,000 angstroms.

Claim 5

The memory as set forth in claim 3 wherein said second region of GaN has an injecting contact thereto comprising In or In alloys.

Claim 6

A non-volatile switch and memory device, comprising: a first region of relatively low resistivity silicon of one conductivity type; a second region of GaN forming a junction with said first region, said second region of GaN containing a high density of material imperfections including deep energy traps existing at densities greater than approximately 1018 cm 3 with said traps including double or more acceptor-like traps in the bulk of said GaN and donor-like traps in the vicinity of said junction so as to produce a device that exhibits a non-volatile high impedance state and a non-volatile low impedance state with both said high impedance state and said low impedance state being accessible in both a bipolar and unipolar mode; and means to apply energy to access either one of the said impedance states of said device, said means to apply energy including means to apply unipolar voltage pulses to said device for reversibly switching from either one of said states to the other using said unipolar pulses.

Claim 7

A non-volatile switch and memory device, comprising: a first region of relatively low resistivity silicon of one conductivity type; a second region of GaN forming a junction with said first region, said second region of GaN containing a high density of material imperfections including deep energy traps existing at densities greater than approximately 1018 cm 3 with said traps including double or more acceptor-like traps in the bulk of said GaN and donor-like traps in the vicinity of said junction so as to produce a device that exhibits a non-volatile high impedance state and a non-volatile low impedance state with both said high impedance state and said low impedance state being accessible in both a bipolar and unipolar mode; and means to apply energy to access either one of the said impedance states of said device, said means to apply energy including means to apply unipolar voltage pulses to said device for reversibly switching from either one of said states to the other using said unipolar pulses.

Claim 8

The switch and memory device as set forth in claim 5 wherein said GaN is sputtered GaN of high resistivity.

Claim 9

The switch and memory device as set forth in claim 5 wherein said GaN has a thickness in the range 500 angstroms to 10,000 angstroms.

Claim 10

The switch and memory device as set forth in claim 6 wherein said means to apply energy includes an injecting contact to said region of GaN made from In or In alloys.

Claim 11

A non-volatile memory, comprising: a first region of relatively low resistivity silicon; a second region of GaN forming a junction with said first region, said second region of GaN containing a high density of material imperfections including deep energy traps existing at densities greater than 1018 cm 3 with said traps including double or more acceptor-like traps in the bulk of said GaN and donor-like traps in the vicinity of said junction so as to form a memory that exhibits a non-volatile high impedance state and a non-volatile low impedance state with both said high impedance state and said low impedance state being addressable in both a bipolar and unipolar mode; and means to apply energy between said first and second regions, said means to apply energy including an injecting contact to said second region and unipolar voltage pulse means coupled to said injecting contact and said first region for switching said device from said high impedance state to said low impedance state and from said low impedance state to said high impedance state using said unipolar pulses.

Claim 12

A non-volatile memory, comprising: a first region of relatively low resistivity silicon; a second region of GaN forming a junction with said first region, said second region of GaN containing a high density of material imperfections including deep energy traps existing at densities greater than 1018 cm 3 with said traps including double or more acceptor-like traps in the bulk of said GaN and donor-like traps in the vicinity of said junction so as to form a memory that exhibits a non-volatile high impedance state and a non-volatile low impedance state with both said high impedance state and said low impedance state being addressable in both a bipolar and unipolar mode; and means to apply energy between said first and second regions, said means to apply energy including an injecting contact to said second region and unipolar voltage pulse means coupled to said injecting contact and said first region for switching said device from said high impedance state to said low impedance state and from said low impedance state to said high impedance state using said unipolar pulses.

Claim 13

The memory as set forth in claim 9 wherein said GaN is sputtered GaN of high resistivity.

Claim 14

The memory as set forth in claim 9 wherein said GaN has a thickness in the range 500 angstroms to 10,000 angstroms.

Claim 15

The memory as set forth in claim 10 wherein said injecting contact comprises In or In alloys.

Claim 16

A non-volatile bistable switch and memory device operable between first and second impedance states in both a bipolar and unipolar mode, comprising: a crystalline silicon substrate; a layer of GaN sputtered onto said silicon substrate so as to form a semi-insulating layer thereon and a junction therewith with said sputtered GaN acting to exhibit a high density of material imperfections including deep energy traps existing at densities greater than approximately 1018 cm 3 with said traps including double or more acceptor-like traps in the bulk of said GaN and donor-like traps in the vicinity of said junction so as to establish said bistable switch; means to make contact to said substrate and layer of GaN; and voltage pulse means coupled to said means to make contact for switching said device between said first and second impedance states, said voltage pulse means including unipolar voltage pulse means for switching said device from said first impedance to said second impedance state and from said second impedance state to said first impedance state using said unipolar pulses.

Claim 17

A non-volatile bistable switch and memory device operable between first and second impedance states in both a bipolar and unipolar mode, comprising: a crystalline silicon substrate; a layer of GaN sputtered onto said silicon substrate so as to form a semi-insulating layer thereon and a junction therewith with said sputtered GaN acting to exhibit a high density of material imperfections including deep energy traps existing at densities greater than approximately 1018 cm 3 with said traps including double or more acceptor-like traps in the bulk of said GaN and donor-like traps in the vicinity of said junction so as to establish said bistable switch; means to make contact to said substrate and layer of GaN; and voltage pulse means coupled to said means to make contact for switching said device between said first and second impedance states, said voltage pulse means including unipolar voltage pulse means for switching said device from said first impedance to said second impedance state and from said second impedance state to said first impedance state using said unipolar pulses.

Claim 18

The device as set forth in claim 13 wherein the resistivity of said layer of GaN is in the range of 105 to 1010 ohm/cm.

Claim 19

The device as set forth in claim 13 wherein said GaN has a thickness in the range 500 angstroms to 10,000 angstroms.

Claim 20

A non-volatile bistable switch and memory device exhibiting characterisTics which allow switching between a pair of impedance states in both a bipolar and unipolar mode, comprising: a first region of one conductivity type crystalline silicon; a second region of relatively high resistivity crystalline GaN forming a junction with said first region and having a doping density to give a conductivity type, said second region of relatively high resistivity GaN containing a density of material imperfections including double or more acceptor-like deep energy traps greater than the said doping density thereof to give said conductivity type; an injecting contact formed onto said second region; and means coupled to said injecting contact and to said first region for switching said device between said impedance states, said means coupled to said injecting contact and to said first region for switching said device between impedance states including means for applying unipolar voltage pulses to said device for reversibly switching said device between said pair of impedance states using said unipolar voltage pulses.

Claim 21

A non-volatile bistable switch and memory device exhibiting characterisTics which allow switching between a pair of impedance states in both a bipolar and unipolar mode, comprising: a first region of one conductivity type crystalline silicon; a second region of relatively high resistivity crystalline GaN forming a junction with said first region and having a doping density to give a conductivity type, said second region of relatively high resistivity GaN containing a density of material imperfections including double or more acceptor-like deep energy traps greater than the said doping density thereof to give said conductivity type; an injecting contact formed onto said second region; and means coupled to said injecting contact and to said first region for switching said device between said impedance states, said means coupled to said injecting contact and to said first region for switching said device between impedance states including means for applying unipolar voltage pulses to said device for reversibly switching said device between said pair of impedance states using said unipolar voltage pulses.

Claim 22

The device as set forth in claim 16 wherein the said density of material imperfections including deep energy traps is greater than approximately 3 X 1018 cm 3.

Claim 23

The device as set forth in claim 16 wherein said GaN has a thickness in the range 500 angstroms to 10,000 angstroms.

Claim 24

A non-volatile bistable switch and memory device switchable back and forth between a high impedance state and a low impedance state in both unipolar and bipolar modes, comprising: a heterojunction including a first region of relatively low resistivity crystalline silicon heavily doped to provide one conductivity type and a second region including high resistivity crystalline GaN doped to provide a conductivity type, said GaN forming a junction with said silicon with the GaN of said second region and the interface thereat with said silicon having a high density of material imperfections including double or more acceptor-like deep energy traps within the bulk thereof existing at densities greater than approximately 3 X 1018 cm 3 such as to cause said device to exhibit the said high and low impedance states; and means coupled to said device for switching said device between the said impedance states, said means coupled to said device for switching said device between said impedance states including means for applying unipolar voltage pulses to said device for reversibly switching said device back and forth between said high impedance state and said low impedance state using said unipolar voltage pulses.

Claim 25

A non-volatile bistable switch and memory device switchable back and forth between a high impedance state and a low impedance state in both unipolar and bipolar modes, comprising: a heterojunction including a first region of relatively low resistivity crystalline silicon heavily doped to provide one conductivity type and a second region including high resistivity crystalline GaN doped to provide a conductivity type, said GaN forming a junction with said silicon with the GaN of said second region and the interface thereat with said silicon having a high density of material imperfections including double or more acceptor-like deep energy traps within the bulk thereof existing at densities greater than approximately 3 X 1018 cm 3 such as to cause said device to exhibit the said high and low impedance states; and means coupled to said device for switching said device between the said impedance states, said means coupled to said device for switching said device between said impedance states including means for applying unipolar voltage pulses to said device for reversibly switching said device back and forth between said high impedance state and said low impedance state using said unipolar voltage pulses.

Claim 26

A semiconductor bistable impedance and memory element including a first region of crystalline silicon of one conductivity type and a second region of semi-insulating crystalline GaN of a resistivity between 105 and 1010 ohm/cm and of a conductivity type, said second region forming a heterojunction with said silicon and containing a high density of material imperfections including deep energy level traps existing at densities greater than 3 X 1018 cm 3, said traps acting when full to effect a high impedance state in said element and when empty to effect a low impedance state in said element, and means coupled to said element for applying unipolar voltage pulses to said element to switch said element from said high impedance state to said low impedance state and from said low impedance state to said high impedance state using said unipolar voltage pulses.

Claim 27

A semiconductor bistable impedance and memory element including a first region of crystalline silicon of one conductivity type and a second region of semi-insulating crystalline GaN of a resistivity between 105 and 1010 ohm/cm and of a conductivity type, said second region forming a heterojunction with said silicon and containing a high density of material imperfections including deep energy level traps existing at densities greater than 3 X 1018 cm 3, said traps acting when full to effect a high impedance state in said element and when empty to effect a low impedance state in said element, and means coupled to said element for applying unipolar voltage pulses to said element to switch said element from said high impedance state to said low impedance state and from said low impedance state to said high impedance state using said unipolar voltage pulses.

Claim 28

The element as set forth in claim 20 wherein said semi-insulating GaN is RF sputtered GaN.

Claim 29

The element as set forth in claim 21 wherein said first region of silicon is doped to a density of 1018 impurity atoms cm 3 or greater to give said one conductivity type.

Claim 30

The element as set forth in claim 22 wherein said traps include double or more acceptor-like traps In the bulk of said GaN and donor-like traps in the vicinity of said heterojunction.