Patent US3851270A successfully refreshed from Google Patents.
US3851270A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistorized operational amplifier
Assignee: Individual
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Filing: 1971-04-20
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Granted: 1974-11-26
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Expires: 1991-04-20
Abstract
Abstract An operational amplifier comprising transistors in which the input stage has a constant current load. A feedback regulator circuit is employed to stabilize operation of the input stage. The operational amplifier provides a high impedance, high gain input stage, thereby minimizing gain requirements of succeeding stages. The matching of components comprising succeeding stages is therefore not overly critical.
Inventors
- 👤 R Vosteen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 10:19
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
330 words
An operational amplifier comprising: a first amplifier stage having first (T1) and second (T2) transistors arranged in differential amplifier manner, each of the first and second transistors having a first electrode operative to provide a current flow, a second electrode operative to control the current flow, and a third electrode operative to accept the current flow connected as the output electrode, means to apply opposite polarity inputs to the respective second electrodes of the first and second transistors, load means including third and fourth transistors (T3,T4), each having emitter, collector and base electrodes, the third and collector electrodes of the first and third transistors, respectively, being connected in common as a first common connection, and the third and collector electrodes of the second and fourth transistors, respectively, being connected in common as a second common connection, the base electrodes of the third and fourth transistors being connected together, the third and fourth transistors providing first and second constant current loads for the first and second transistors, respectively, at least one additional amplifier stage (T7, T8, T9, T10, T11) having first and second inputs respectively connected to the first and second common connections of the first stage and its output connected as the amplifier output, positive (+) and negative (-) supply terminals for connection to a suitable source of DC voltage, and means connecting the electrodes of the transistors to the supply terminals to operatively bias the transistors, a source of reference potential, and common mode feedback means (T5, T6, R15, R17, R19, C2) connected between said at least one additional stage and the first amplifier stage including means connected to the source of reference potential and responsive to differences between the actual voltages present at the outputs of the first and second transistors and the reference potential to correct the actual voltages present at the outputs of the first and second transistors and maintain the preset common mode output voltages from the first and second transistors at a constant value.
Claim 2
Dependent Claim
330 words
An operational amplifier comprising: a first amplifier stage having first (T1) and second (T2) transistors arranged in differential amplifier manner, each of the first and second transistors having a first electrode operative to provide a current flow, a second electrode operative to control the current flow, and a third electrode operative to accept the current flow connected as the output electrode, means to apply opposite polarity inputs to the respective second electrodes of the first and second transistors, load means including third and fourth transistors (T3,T4), each having emitter, collector and base electrodes, the third and collector electrodes of the first and third transistors, respectively, being connected in common as a first common connection, and the third and collector electrodes of the second and fourth transistors, respectively, being connected in common as a second common connection, the base electrodes of the third and fourth transistors being connected together, the third and fourth transistors providing first and second constant current loads for the first and second transistors, respectively, at least one additional amplifier stage (T7, T8, T9, T10, T11) having first and second inputs respectively connected to the first and second common connections of the first stage and its output connected as the amplifier output, positive (+) and negative (-) supply terminals for connection to a suitable source of DC voltage, and means connecting the electrodes of the transistors to the supply terminals to operatively bias the transistors, a source of reference potential, and common mode feedback means (T5, T6, R15, R17, R19, C2) connected between said at least one additional stage and the first amplifier stage including means connected to the source of reference potential and responsive to differences between the actual voltages present at the outputs of the first and second transistors and the reference potential to correct the actual voltages present at the outputs of the first and second transistors and maintain the preset common mode output voltages from the first and second transistors at a constant value.
Claim 3
Dependent Claim
104 words
The operational amplifier recited in claim 1 wherein said at least one additional stage comprises: a second stage including fifth (T7) and sixth (T11) transistors arranged as emitter followers respectively connected to the outputs of the first (T1) and second (T2) transistors, a third stage including seventh (T8) and eighth (T9) transistors arranged in differential amplifier fashion, the bases of the seventh and eighth transistors respectively being connected to the emitters of the fifth and sixth transistors, and being of opposite polarity with respect to the latter, the outputs of the seventh (T8) and eighth (T9) transistors being coupled to the operational amplifier output.
Claim 4
Dependent Claim
114 words
The operational amplifier recited in claim 2 wherein said third stage further includes a ninth (T10) transistor of opposite polarity with respect to the seventh (T8) and eighth (T9) transistors, the collector of said seventh (T8) transistor being directly connected to the base of the ninth (T10) transistor and the collectors of the eighth (T9) and ninth (T10) transistors being connected together, means (R19) connected across the base and emitter of the ninth (T10) transistor to develop a voltage corresponding to the actual voltages present at the outputs of the first and second transistors, the common mode feedback means being connected between said last cited means and the first (T1) and second (T2) transistors.
Claim 5
Dependent Claim
34 words
The operational amplifier recited in claim 1 wherein the first (T1) and second (T2) transistors each comprise field effect transistors with the first electrode being the source and the third electrode being the drain.
Claim 6
Dependent Claim
65 words
The operational amplifier recited in claim 4 wherein the sources (S1, S2) of the first (T1) and second (T2) transistors are connected to the common mode feedback means and the drains of the first (T1) and second (T2) transistors are respectively connected to the collectors of the third (T3) and fourth (T4) transistors, the emitters of the latter being connected to the positive supply terminal.
Claim 7
Dependent Claim
38 words
The operational amplifier recited in claim 4 wherein the common mode feedback means are connected between the output of said at least one additional stage and the sources (S1, S2) of the first (T1) and second (T2) transistors.
Claim 8
Dependent Claim
42 words
The operational amplifier recited in claim 4 further comprising: variable resistance means (1) interposed between the common mode feedback means and the sources (S1, S2) of the first (T1) and second (T2) transistors to provide zero (0) voltage adjustment for the latter.
Claim 9
Dependent Claim
41 words
The operational amplifier recited in claim 1 further comprising: matching means selectively connected between the third (T3) and fourth (T4) transistors and the positive supply terminal to provide precise matching of the operating characteristics of the transistors to prevent amplifier drift.
Claim 10
Dependent Claim
23 words
The operational amplifier recited in claim 1 further comprising: compensation means (D1-D5) connected to selected transistors to compensate for the temperature coefficients thereof.
Claim 11
Dependent Claim
45 words
The operational amplifier recited in claim 1 further comprising: stabilizing means connected to selected amplifier stages (R16, C3; R9, C4; R2, C1) to separate the turnover frequencies of the amplifier stages and thereby reduce possibilities of oscillation due to feedback with low closed loop gain.
Claim 12
Dependent Claim
162 words
The operational amplifier recited in claim 1 further comprising: feedback connection means coupled between the output and input connections of the operational amplifier so that it functions as a differential amplifier including first (28) resistance means connected between the output of the operational amplifier (3) and the first electrode (8) of the second transistor (T2), second (30) and third (20) resistance means respectively connected between the first electrodes (7,8) of the first (T1) and second transistors (T2) and the common mode feedback means (T5), fourth resistance means (31) connected between the third electrode (8) of the second transistor (T2) and ground (4), adjustable gain control means (2) shunting the second (30) and third (29) resistance means to control the gain of the differential amplifier by varying the effective values of the second and third resistances, variable resistance (R37 and R32) means connected to the electrodes of the first (T1) and second (T2) transistors to provide zero (0) voltage adjustment for the latter.
Claim 13
Dependent Claim
33 words
The operational amplifier recited in claim 11 wherein the first (T1) and second (T2) transistors comprise field effect transistors with the first electrode being the source and the third electrode being the drain.
References Cited (Backward Citations)
US3370242A
Cited
US3474347A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-11-25 | 1978-05-27 | 1978-11-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-11-25 | 1982-05-27 | 1982-11-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-11-25 | 1986-05-27 | 1986-11-26 | $7700.00 | Window Closed / Lapsed |