Interrogator-transponder fruit reducer

Claim 2

In a prober-remitter collision avoidance system employing two distinct probe signal types, Po and Qo, a probe selector comprising: an output terminal; first means for detecting the presence of a signal P1 and for producing a signal Pi; second means for detecting the presence of a signal Q1 and for producing a signal Qi; third means connected to the output of said first means for providing a Qo-probe signal to said output terminal upon receipt of said signal Pi; fourth means connected to the output of said second means for providing a Po probe signal to said output terminal upon receipt of said signal Qi; fifth means connected to the output of said first means and to the output of said second means for providing to said output terminal a probe signal opposite in type to the last received said Pi or Qi signals when said signals are detected concomitantly by said first and second means; and sixth means connected to the output of said first means and to the output of said second means and adapted to provide a randomly selected Po- or Qo-probe signal to said output terminal when said first and second means fail to detect said P1 or Q1 signals within a predetermined time interval.

Claim 3

A probe selector comprising: first means for detecting the presence of a signal P1 and for producing a signal Pi; second means for detecting the presence of a signal Q1 and for producing a signal Qi; random timing generator means for producing a Q timing signal and a P timing signal on a mutually exclusive and random basis; combining means for detecting the presence of said P timing signal and said Q timing signal and for producing a T timing signal in response thereto; first AND gate means responsive to said signal Pi and to said signal T for producing a signal PiT; second AND gate means responsive to said signal Qi and to said signal T for producing a signal QiT; first probe oscillator means for producing a signal A; second probe oscillator means for producing a signal B; first inverting means responsive to said signal QiT for producing a signal QiT; second inverting means responsive to said signal PiT for producing a signal PiT; first OR gate means responsive to said P timing signal and to said signal QiT for producing a signal X; second OR gate means responsive to said Q timing signal and to said signal PiT for producing a signal Y; third AND gate means responsive to said signal PiT, to said signal X, and to said signal A, for producing a signal Po; fourth AND gate means responsive to said signal QiT, to said signal Y, and to said signal B for producing a signal Qo; comparator means responsive to said signal Pi and to said signal Qi for producing a YES signal when Pi occurs before Qi and for producing a NO signal when Qi occurs before Pi; first logic gate means responsive to said signal PiT, to said signal QiT, to said signal A, and to said YES signal for producing a signal Po; second logic gate means responsive to said signal PiT, to said signal QiT, to said signal B and to said NO signal for producing a signal Qo.

Claim 4

A probe selector comprising: first means for detecting the presence of a signal P1 and for producing a signal Pi; second means for detecting the presence of a signal Q1 and for producing a signal Qi; random timing generator means for producing a Q timing signal and a P timing signal on a mutually exclusive and random basis; combining means for detecting the presence of said P timing signal and said Q timing signal and for producing a T timing signal in response thereto; first AND gate means responsive to said signal Pi and to said signal T for producing a signal PiT; second AND gate means responsive to said signal Qi and to said signal T for producing a signal QiT; first probe oscillator means for producing a signal A; second probe oscillator means for producing a signal B; first inverting means responsive to said signal QiT for producing a signal QiT; second inverting means responsive to said signal PiT for producing a signal PiT; first OR gate means responsive to said P timing signal and to said signal QiT for producing a signal X; second OR gate means responsive to said Q timing signal and to said signal PiT for producing a signal Y; third AND gate means responsive to said signal PiT, to said signal X, and to said signal A, for producing a signal Po; fourth AND gate means responsive to said signal QiT, to said signal Y, and to said signal B for producing a signal Qo; comparator means responsive to said signal Pi and to said signal Qi for producing a YES signal when Pi occurs before Qi and for producing a NO signal when Qi occurs before Pi; first logic gate means responsive to said signal PiT, to said signal QiT, to said signal A, and to said YES signal for producing a signal Po; second logic gate means responsive to said signal PiT, to said signal QiT, to said signal B and to said NO signal for producing a signal Qo.

Claim 5

The probe selector of claim 2 wherein said first means and said second means both include a pulse stretcher means for producing pulses of predetermined width.

Claim 6

The probe selector of claim 3 wherein said first logic gate means and said second logic gate means both include a logic AND gate.

Claim 7

The probe selector of claim 2 wherein said comparator means produces said YES signal according to the Boolean function YES Pif1f2 and produces said No signal according to the Boolean function NO Qif1f2, where F1 PiQi + Pif1, F2 PQi + Qif2 and f1,2(t) F1,2(t- Delta t).

Claim 8

The probe selector of claim 2 further including an OR gate responsive to said signals Po and to said signals Qo.

Claim 9

In an interrogator-transponder collision avoidance system employing two distinct probe signals, a probe selector, which insures that a transmitted probe is opposite in type to the last received probe, comprising: first pulse stretcher means for stretching a received P1-type probe to produce a signal Pi; second pulse stretcher means for stretching a received Q1-type probe to produce a signal Qi; random timing means for producing two mutually exclusive output signals P and Q; combining means for combining said P and Q signals in a logical OR fashion to produce a signal T; first AND gate means connected to the output of said first pulse stretcher means and to the output of said combining means 44 for producing a signal PiT; second AND gate means connected to the output of said second pulse stretcher means and to the output of said combining means 44 for producing a signal QiT; first OR gate means connected to the output of said second AND gate means and to said P output signal of said random timing means; second OR gate means connected to the output of said first AND gate means and to said Q-output signal of said random timing means; third AND gate means connected to the output of said first OR gate means, to the inverted output of said first AND gate means and to the output of a Po-probe oscillator means; fourth AND gate means connected to the output of said second OR gate means, to the inverted output of said second gate means and to the output of a Qo-probe oscillator means; third OR gate means connected to the output of said third AND gate means, to the output of said fourth AND gate means, and to the output of a Po AND gate means and a Qo AND gate means; said Po AND gate means being responsive to the output of said Po-probe oscillator means, to the output of said first AND gate means, to the output of said second AND gate means and to the YES output of a comparator means; said Qo AND gate means being responsive to the output of said Qo-probe oscillator means, to the output of said first AND gate means, to the output of said second AND gate means and to the NO output of said comparator means; said comparator means being responsive to said signal Pi and to said signal Qi to produce said YES signal when Pi occurs before Qi and to produce said NO signal when Qi occurs before Pi.

Claim 10

In an interrogator-transponder collision avoidance system employing two distinct probe signals, a probe selector, which insures that a transmitted probe is opposite in type to the last received probe, comprising: first pulse stretcher means for stretching a received P1-type probe to produce a signal Pi; second pulse stretcher means for stretching a received Q1-type probe to produce a signal Qi; random timing means for producing two mutually exclusive output signals P and Q; combining means for combining said P and Q signals in a logical OR fashion to produce a signal T; first AND gate means connected to the output of said first pulse stretcher means and to the output of said combining means 44 for producing a signal PiT; second AND gate means connected to the output of said second pulse stretcher means and to the output of said combining means 44 for producing a signal QiT; first OR gate means connected to the output of said second AND gate means and to said P output signal of said random timing means; second OR gate means connected to the output of said first AND gate means and to said Q-output signal of said random timing means; third AND gate means connected to the output of said first OR gate means, to the inverted output of said first AND gate means and to the output of a Po-probe oscillator means; fourth AND gate means connected to the output of said second OR gate means, to the inverted output of said second gate means and to the output of a Qo-probe oscillator means; third OR gate means connected to the output of said third AND gate means, to the output of said fourth AND gate means, and to the output of a Po AND gate means and a Qo AND gate means; said Po AND gate means being responsive to the output of said Po-probe oscillator means, to the output of said first AND gate means, to the output of said second AND gate means and to the YES output of a comparator means; said Qo AND gate means being responsive to the output of said Qo-probe oscillator means, to the output of said first AND gate means, to the output of said second AND gate means and to the NO output of said comparator means; said comparator means being responsive to said signal Pi and to said signal Qi to produce said YES signal when Pi occurs before Qi and to produce said NO signal when Qi occurs before Pi.