US3847690A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of protecting against electrochemical effects during metal etching
Assignee: Fairchild Semiconductor Corp
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Filing: 1973-10-24
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Granted: 1974-11-12
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Expires: 1993-10-24
Abstract
Abstract The differential etch rate between metals connected by differing resistivity paths to the backside of a semiconductor wafer is eliminated by coating with insulation the normally uninsulated surfaces of the wafer prior to submerging the wafer in the etch solution.
Inventors
- 👤 J Campbell
- 👤 A Engvall
- 👤 A Lewis
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 12:36
CPC Classifications
H; H10; H10P; H10P95/00; H10P50/00
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
154 words
IN THE METHOD OF ETCHING PORTIONS OF A METAL LAYER FORMED ONLY ON THE FRONT SURFACE OF A SLICE OF SEMICONDUCTOR MATERIAL CONTAINING CURRENT CONDUCTING PATHS FROM ITS BACK SURFACE TO ITS FRONT SURFACE, SAID METAL LAYER BEING SEPARATED IN PLACES FROM SAID SEMICONDUCTOR MATERIAL BY INSULATION AND THE ETCHANT USED BEING SELECTED TO SUBSTANTIALLY ETCH ONLY THE METAL LAYER, COMPRISING THE STEP OF MASKING SAID METAL LAYER AND ETCHING AWAY THE UNMASKED PORTONS OF SAID METAL LAYER, THE IMPROVEMENT COMPRISING THE STEPS OF: PLACING AN INSULATION RESISTANT TO THE ETCHING SOLUTION ON THE EDGES AND BACK SIDE OF SAID SLICE PRIOR TO SUBMERGING SAID SLICE IN AN ETCHING SOLUTION, SUBMERGING THE INSULATION COATED SLICE IN THE ETCHANT SOLUTION FOR REMOVING THE UNMASKED PORTIONS OF THE METAL LAYER, AND REMOVING SAID SLICE FROM THE ETHANG SOLUTION, SAID INSULATION PREVENTING THE FORMATION OF ANY ELECTROEHCMICAL EFFECTS BETWEEN THE MATRIAL TO BE ETCHED AND THE SUBSTRATE.
Claim 2
Dependent Claim
154 words
IN THE METHOD OF ETCHING PORTIONS OF A METAL LAYER FORMED ONLY ON THE FRONT SURFACE OF A SLICE OF SEMICONDUCTOR MATERIAL CONTAINING CURRENT CONDUCTING PATHS FROM ITS BACK SURFACE TO ITS FRONT SURFACE, SAID METAL LAYER BEING SEPARATED IN PLACES FROM SAID SEMICONDUCTOR MATERIAL BY INSULATION AND THE ETCHANT USED BEING SELECTED TO SUBSTANTIALLY ETCH ONLY THE METAL LAYER, COMPRISING THE STEP OF MASKING SAID METAL LAYER AND ETCHING AWAY THE UNMASKED PORTONS OF SAID METAL LAYER, THE IMPROVEMENT COMPRISING THE STEPS OF: PLACING AN INSULATION RESISTANT TO THE ETCHING SOLUTION ON THE EDGES AND BACK SIDE OF SAID SLICE PRIOR TO SUBMERGING SAID SLICE IN AN ETCHING SOLUTION, SUBMERGING THE INSULATION COATED SLICE IN THE ETCHANT SOLUTION FOR REMOVING THE UNMASKED PORTIONS OF THE METAL LAYER, AND REMOVING SAID SLICE FROM THE ETHANG SOLUTION, SAID INSULATION PREVENTING THE FORMATION OF ANY ELECTROEHCMICAL EFFECTS BETWEEN THE MATRIAL TO BE ETCHED AND THE SUBSTRATE.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-11-11 | 1978-05-13 | 1978-11-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-11-11 | 1982-05-13 | 1982-11-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-11-11 | 1986-05-13 | 1986-11-12 | $7700.00 | Window Closed / Lapsed |