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US3846822A
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Methods for making field effect transistors
Assignee: AT&T Inc
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Filing: 1973-10-05
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Granted: 1974-11-05
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Expires: 1993-10-05
Abstract
Abstract A self-aligned high-frequency IGFET having source, channel, drift and drain regions, and a gate electrode electrically isolated from the drift region, is made by using an oxide mesa to define the boundaries of the gate electrode, drift region and drain region. The gate electrode is formed by using the mesa as a shadow mask during an ion milling operation.
Inventors
- 👤 T Riley
- 👤 P Shackle
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 19:33
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/65; H10D30/01; H10D30/021; H10D30/028; H10D30/0281; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01324; H10D64/01326; H10D64/0133; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518; H10P; H10P30/00; H10P30/20; H10P30/22; H10P30/221; H10P30/222; H10P50/00; H10P50/20; H10P76/00; H10P76/40; H10P95/00; H10D64/60; H10D64/66; H10D64/665; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
103 words
In a method for making a field effect transistor comprising the steps of forming source, channel, drift and drain regions, and a gate electrode overlying the channel region, the improvement comprising the steps of: forming an oxide mesa over the drift region portion of a semiconductor wafer; defining the gate electrode on one side of the mesa by shadow masking, said defining step comprising the step of irradiating the mesa at an angle; and using one side of the mesa to define one boundary of the drain region and one side of the gate electrode to define one boundary of the source region.
Claim 2
Dependent Claim
103 words
In a method for making a field effect transistor comprising the steps of forming source, channel, drift and drain regions, and a gate electrode overlying the channel region, the improvement comprising the steps of: forming an oxide mesa over the drift region portion of a semiconductor wafer; defining the gate electrode on one side of the mesa by shadow masking, said defining step comprising the step of irradiating the mesa at an angle; and using one side of the mesa to define one boundary of the drain region and one side of the gate electrode to define one boundary of the source region.
Claim 3
Dependent Claim
66 words
The method of claim 1 wherein: the channel region forming step comprises the steps of: first, forming a mask over the drain region portion of the wafer, second, depositing first impurities on the semiconductor wafer not masked by the mask, the mesa or the gate electrode, and diffusing the deposited impurities into the wafer, whereby the impurities laterally diffuse beneath one side of the gate electrode.
Claim 4
Dependent Claim
53 words
The method of claim 2 wherein: the source forming step comprises the steps of depositing second impurities on the wafer surface impregnated by the first impurities, and diffusing the second impurities to a shallower depth than the first impurity diffusion, thereby to leave intact a short channel region defined beneath the gate electrode.
Claim 5
Dependent Claim
49 words
The method of claim 3 wherein: the gate electrode defining step comprises the steps of coating a surface of the wafer and mesa with a metal layer, and ion milling all but a gate electrode portion of the metal layer by irradiating the mesa at an angle with ions.
Claim 6
Dependent Claim
45 words
The method of claim 4 further comprising the steps of: forming a thin oxide layer over the wafer portion not covered by the mesa; and wherein the depositing steps each comprises the step of ion implanting impurities in the wafer through the thin oxide layer.
Claim 7
Dependent Claim
26 words
The method of claim 5 wherein: the gate electrode is formed over the thin oxide layer overlying the channel region, whereby the transistor constitutes an IGFET.
Claim 8
Dependent Claim
24 words
The improvement of claim 6 wherein: the wafer is of silicon, and the oxide mesa and the thin oxide layer are of silicon dioxide.
Claim 9
Dependent Claim
45 words
The improvement of claim 7 wherein: the channel length at the wafer surface is of the order of 0.2 micrometers, the gate electrode length is of the order of 0.4 micrometers, and there is substantially no overlap of the gate electrode over the drift region.
Claim 10
Dependent Claim
44 words
The improvement of claim 8 wherein: the silicon dioxide mesa is formed by forming a silicon dioxide layer approximately 0.5 micrometers thick, and etching a major portion of it to define the mesa, the mesa defining a drift region length of approximately 0.8 micrometers.
Claim 11
Independent Claim
187 words
A method for making a field effect transistor comprising the steps of: forming a first relatively thick oxide layer over a semiconductor wafer surface; etching all but a portion of the first oxide layer to define an oxide mesa on the wafer surface; forming a second, relatively thin, oxide layer over the wafer surface; forming a metal layer over the second oxide layer and the mesa; removing all the metal layer except a portion on one side of the mesa, thereby to define a gate electrode; said removing step comprising the step of irradiating the mesa at an angle such that the mesa shadow masks the gate electrode portion of the metal layer; diffusing a first impurity into a first wafer portion contiguous with the gate electrode; diffusing a second impurity into the first wafer portion and into a second wafer portion contiguously with the mesa but opposite the gate electrode, the second impurity in the first wafer portion defining a transistor source region, and the second impurity in the second wafer portion defining a drain region; and forming metal contacts on the source and drain regions.
Claim 12
Independent Claim
187 words
A method for making a field effect transistor comprising the steps of: forming a first relatively thick oxide layer over a semiconductor wafer surface; etching all but a portion of the first oxide layer to define an oxide mesa on the wafer surface; forming a second, relatively thin, oxide layer over the wafer surface; forming a metal layer over the second oxide layer and the mesa; removing all the metal layer except a portion on one side of the mesa, thereby to define a gate electrode; said removing step comprising the step of irradiating the mesa at an angle such that the mesa shadow masks the gate electrode portion of the metal layer; diffusing a first impurity into a first wafer portion contiguous with the gate electrode; diffusing a second impurity into the first wafer portion and into a second wafer portion contiguously with the mesa but opposite the gate electrode, the second impurity in the first wafer portion defining a transistor source region, and the second impurity in the second wafer portion defining a drain region; and forming metal contacts on the source and drain regions.
Claim 13
Dependent Claim
29 words
The method of claim 10 wherein: the removing step comprises the step of ion milling that portion of the metal layer that is not shadow masked by the mesa.
Claim 14
Dependent Claim
13 words
A field effect transistor made by the method set forth in claim 10.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-11-04 | 1978-05-06 | 1978-11-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-11-04 | 1982-05-06 | 1982-11-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-11-04 | 1986-05-06 | 1986-11-05 | $7700.00 | Window Closed / Lapsed |