Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
63 words
A composite information storage device compising: a semiconductor substrate of one conductivity type; a pair of regions of opposite conductivity type disposed in said substrate defining a channel region therebetween; a variable threshold device which includes a first portion of said channel region; and, at least a fixed threshold device which includes a portion of said channel region different from said first portion.
Claim 2
Dependent Claim
63 words
A composite information storage device compising: a semiconductor substrate of one conductivity type; a pair of regions of opposite conductivity type disposed in said substrate defining a channel region therebetween; a variable threshold device which includes a first portion of said channel region; and, at least a fixed threshold device which includes a portion of said channel region different from said first portion.
Claim 3
Dependent Claim
19 words
A composite information storage device according to claim 1, wherein said variable threshold device is an MNOS (Metal-Nitride-Oxide-Semiconductor) device.
Claim 4
Dependent Claim
19 words
A composite information storage device according to claim 1 wherein said variable threshold device is an MAOS (Metal-Aluminumoxide-Oxide-Semiconductor) device.
Claim 5
Dependent Claim
19 words
A composite information storage device according to claim 1 wherein said fixed threshold device is an MOS (Metal-Oxide-SemiconductoR) device.
Claim 6
Dependent Claim
27 words
A composite information storage device according to claim 1 wherein said fixed threshold device is an MNOS device wherein the oxide is sufficiently thick to prevent tunneling.
Claim 7
Dependent Claim
23 words
A composite information storage device according to claim 1 wherein said fixed and variable threshold devices are actuated by a common gate electrode.
Claim 8
Dependent Claim
85 words
A storage device comprising: a semiconductor wafer of one conductivity type having disposed therein source and drain of opposite conductivity type and a channel region disposed therebetween; and, an oxide layer having at least first and second portions disposed over said channel region said first portion having a thickness sufficient to permit the tunneling of carriers therethrough and said second portion having a thickness sufficient to prevent the tunneling of carriers therethrough to provide a fixed threshold device in series with a variable threshold device.
Claim 9
Dependent Claim
85 words
A storage device comprising: a semiconductor wafer of one conductivity type having disposed therein source and drain of opposite conductivity type and a channel region disposed therebetween; and, an oxide layer having at least first and second portions disposed over said channel region said first portion having a thickness sufficient to permit the tunneling of carriers therethrough and said second portion having a thickness sufficient to prevent the tunneling of carriers therethrough to provide a fixed threshold device in series with a variable threshold device.
Claim 10
Dependent Claim
28 words
A storage device according to claim 1 further including a layer of one of the materials aluminum oxide and silicon nitride disposed over at least said first portion.
Claim 11
Dependent Claim
25 words
A storage device according to claim 1 further including a gate electrode disposed over said at least first and second portions of said oxide layer.
Claim 12
Dependent Claim
16 words
A storage device according to claim 1 wherein said oxide layer is made of silicon dioxide.
Claim 13
Dependent Claim
126 words
In a memory array, the storage devices of which are subjected to repeated storage, erase and read-out cycles, a plurality of storage devices each comprising: a semiconductor substrate having source and drain regions disposed therein and defining a channel therebetween; means disposed in electrically coupled relationships with a portion of said channel for rendering said portion conductive at low threshold voltages, the voltages being of such magnitude as to permit spurious conduction in said channel in a depletion mode; and means disposed in electrically coupled relationship with at least another portion of said channel for rendering it conductive at a fixed thershold voltage, said fixed threshold voltage being independent of said low threshold voltages and of such magnitude as to be conductive in an enhancement mode.
Claim 14
Dependent Claim
126 words
In a memory array, the storage devices of which are subjected to repeated storage, erase and read-out cycles, a plurality of storage devices each comprising: a semiconductor substrate having source and drain regions disposed therein and defining a channel therebetween; means disposed in electrically coupled relationships with a portion of said channel for rendering said portion conductive at low threshold voltages, the voltages being of such magnitude as to permit spurious conduction in said channel in a depletion mode; and means disposed in electrically coupled relationship with at least another portion of said channel for rendering it conductive at a fixed thershold voltage, said fixed threshold voltage being independent of said low threshold voltages and of such magnitude as to be conductive in an enhancement mode.
Claim 15
Dependent Claim
22 words
In a memory array according to claim 11 further including a common gate electrode which is disposed over said channel region portions.
Claim 16
Dependent Claim
44 words
In a memory array according to claim 11 wherein said means for rendering said portion conductive at low threshold voltages includes a pair of insulating layers disposed over said portion of said channel and a gate electrode which is common to said region portions.
Claim 17
Dependent Claim
54 words
In a memory array according to claim 11 wherein said means for rendering said at least another portion of said channel conductive at a fixed threshold voltage includes at least an insulating layer disposed over said another portion of said channel region and a gate electrode which is common with said channel region portion.
Claim 18
Dependent Claim
25 words
In a memory array according to claim 11 wherein said means for rendering said portion conductive at low threshold voltages is an MNOS (Metal-Nitride-Oxide-Semiconductor) device.
Claim 19
Dependent Claim
25 words
In a memory array according to claim 11 wherein said means for rendering said porton conductive at low threshold voltages is an MAOS (Metal-Aluminum-Oxide-Semiconductor) device.
Claim 20
Dependent Claim
33 words
In a memory array according to claim 12 further including means connected to said common gate and to said source and drain regions for applying potentials thereto to read, write, and erase information.
Claim 21
Dependent Claim
18 words
In a memory array according to claim 14 wherein said at least one insulating layer is silicon dioxide.
Claim 22
Dependent Claim
27 words
In a memory array according to claim 14 wherein said at least an insulating layer is a layer of silicon dioxide and a layer of silicon nitride.
Claim 23
Dependent Claim
89 words
In an array, a circuit arrangement comprising, a plurality of variable threshold information storage devices which have changed from enchancement mode to depletion mode devices at low threshold due to repeaTed cycling, said devices being connected to bit and word lines, means connected to said devices for reading information stored in at least a selected device and, means connected in series with each of said devices for blocking the conduction of devices other than said at least a selected device during reading of said at least a selected device.
Claim 24
Dependent Claim
89 words
In an array, a circuit arrangement comprising, a plurality of variable threshold information storage devices which have changed from enchancement mode to depletion mode devices at low threshold due to repeaTed cycling, said devices being connected to bit and word lines, means connected to said devices for reading information stored in at least a selected device and, means connected in series with each of said devices for blocking the conduction of devices other than said at least a selected device during reading of said at least a selected device.
Claim 25
Dependent Claim
21 words
In an array, a circuit arrangement according to claim 20 wherein said variable threshold information storage devices are MNOS (Metal-Nitride-Oxide-Semiconductor) devices.
Claim 26
Dependent Claim
22 words
In an array, a circuit arrangement according to claim 20 wherein said variable threshold information storage devices are MAOS (Metal-Aluminum oxide-Oxide-Semiconductor) devices.
Claim 27
Dependent Claim
36 words
In an array, a circuit arrangement according to claim 20 wherein said means for blocking includes at least an enhancement mode field effect transistor disposed in series with each of said variable threshold information storage devices.
Claim 28
Dependent Claim
27 words
In an array, a circuit arrangement according to claim 20 further including means connected to said array for writing information into at least one of said devices.
Claim 29
Dependent Claim
25 words
In an array, a circuit arrangement according to claim 23 wherein said field effect transistor and said variable threshold device have a common gate electrode.