US3761901A
Expired / Lapsed
US
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Nonvolatile memory cell
Assignee: NCR Voyix Corp
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Filing: 1972-06-28
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Granted: 1973-09-25
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Expires: 1992-06-28
Abstract
Abstract The present invention relates to a nonvolatile memory cell which includes a fixed threshold write transistor, a fixed threshold storage transistor and an alterable threshold read transistor therein. The gate electrode of the fixed threshold storage transistor is connected to a write or refresh select circuit through the write transistor. The drain electrode of the fixed threshold storage transistor is connected to a read data circuit through the read transistor. Read select, preset and store data circuits are connectable to the gate electrode of the alterable threshold read transistor to read volatile information out of the nonvolatile memory cell, or to nonvolatilely store information which is volatilely held within the nonvolatile memory cell, as power is removed from the nonvolatile memory cell.
Inventors
- 👤 N Aneshansley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 03:31
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/356; H03K3/356008; G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/403; G11C11/405; G11C11/406; G11C14/00; G11C16/00; G11C16/02; G11C16/04; G11C16/0466
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
175 words
A nonvolatile memory cell, comprising: a. a fixed threshold field effect write transistor having a source, drain and insulated gate electrode; b. a fixed threshold field effect storage transistor having a source, drain and insulated gate electrode, the source electrode of the fixed threshold field effect write transistor connected to the gate electrode of the fixed threshold field effect storage transistor; and c. an alterable threshold field effect read transistor having a source, drain and insulated gate electrode, the source electrode of the alterable threshold field effect read transistor connected to the drain electrode of the fixed threshold field effect storage transistor for reading binary information, which exists as either a charge or no charge on the gate electrode of the fixed threshold field effect storage transistor prior to power being removed from said nonvolatile memory cell, and for nonvolatilely holding the binary information of the fixed threshold field effect storage transistor as one of two threshold voltages of the alterable threshold field effect read transistor as power is removed from said nonvolatile memory cell.
Claim 2
Dependent Claim
175 words
A nonvolatile memory cell, comprising: a. a fixed threshold field effect write transistor having a source, drain and insulated gate electrode; b. a fixed threshold field effect storage transistor having a source, drain and insulated gate electrode, the source electrode of the fixed threshold field effect write transistor connected to the gate electrode of the fixed threshold field effect storage transistor; and c. an alterable threshold field effect read transistor having a source, drain and insulated gate electrode, the source electrode of the alterable threshold field effect read transistor connected to the drain electrode of the fixed threshold field effect storage transistor for reading binary information, which exists as either a charge or no charge on the gate electrode of the fixed threshold field effect storage transistor prior to power being removed from said nonvolatile memory cell, and for nonvolatilely holding the binary information of the fixed threshold field effect storage transistor as one of two threshold voltages of the alterable threshold field effect read transistor as power is removed from said nonvolatile memory cell.
Claim 3
Dependent Claim
24 words
The nonvolatile memory cell of claim 1 wherein the alterable threshold field effect read transistor is an alterable threshold MNOS field effect read transistor.
Claim 4
Dependent Claim
24 words
The nonvolatile memory cell of claim 1 wherein the fixed threshold field effect write transistor is a fixed threshold MOS field effect write transistor.
Claim 5
Dependent Claim
24 words
The nonvolatile memory cell of claim 1 wherein the fixed threshold field effect storage transistor is a fixed threshold MOS field effect storage transistor.
Claim 6
Dependent Claim
57 words
The nonvolatile memory cell of claim 1 wherein a store data circuit is connectable to the gate electrode of the alterable threshold field effect read transistor as power is removed from said nonvolatile memory cell for nonvolatilely storing volatile binary information of the fixed threshold field effect storage transistor into the alterable threshold field effect read transistor.
Claim 7
Dependent Claim
59 words
The nonvolatile memory cell of claim 1 wherein a preset circuit is connectable to the gate electrode of the alterable threshold field effect read transistor when power is applied to said nonvolatile memory cell for presetting the threshold voltage of the alterable threshold field effect read transistor to a selected level in anticipation of nonvolatilely storing binary information therein.
Claim 8
Dependent Claim
75 words
The nonvolatile memory cell of claim 1 wherein a retrieve data circuit is connectable to the gate electrode of the alterable threshold field effect read transistor when power is reapplied to said nonvolatile memory cell for applying a retrieve gate voltage to said gate electrode to allow retrieval of nonvolatilely stored binary information of the alterable threshold field effect transistor and the placing of said binary information into said fixed threshold field effect storage transistor.
Claim 9
Dependent Claim
41 words
The nonvolatile memory cell of claim 7 having a differential amplifier connectable to the drain electrode of the alterable threshold field effect storage transistor to sense if the alterable threshold field effect transistor is conductive at a selected retrieve gate voltage.
Claim 10
Dependent Claim
9 words
An array of nonvolatile memory cells of claim 1.
Claim 11
Dependent Claim
14 words
An array of nonvolatile memory cells of claim 1 integrated into a semiconductor wafer.
Claim 12
Dependent Claim
60 words
The array of nonvolatile memory cells of claim 9 wherein a store data circuit is connectable to the gate electrodes of the alterable threshold field effect read transistors as power is removed from said array for nonvolatilely storing the volatile binary information of the fixed threshold field effect storage transistors into the alterable threshold field effect read transistors connected thereto.
Claim 13
Dependent Claim
59 words
The array of nonvolatile memory cells of claim 9 wherein a preset circuit is connectable to the gate electrodes of the alterable threshold field effect read transistors when power is applied to said array for presetting the threshold voltage of the alterable threshold field effect read transistors to a selected level in anticipation of nonvolatilely storing binary information therein.
Claim 14
Dependent Claim
77 words
The array of nonvolatile memory cells of claim 9 wherein a retrieve data circuit is connectable to the gate electrodes of the alterable threshold field effect read transistors when power is reapplied to said nonvolatile memory cells for applying a retrieve gate voltage to said gate electrodes to allow retrieval of nonvolatilely stored binary information of the alterable threshold field effect transistors and the placing of said binary information into said fixed threshold field effect storage transistors.
References Cited (Backward Citations)
US3508211A
Cited
US3718915A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-09-24 | 1977-03-26 | 1977-09-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-09-24 | 1981-03-26 | 1981-09-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-09-24 | 1985-03-26 | 1985-09-25 | $7700.00 | Window Closed / Lapsed |