Print control logic circuitry for on-the-fly printers

Claim 2

A print control logic circuit for use in high speed on-thefly printers, for selectively actuating one or more out of a plurality of character print-inducing members whenever selective type characters forming a part of a continuously moving font of type characters are momentarily brought into respectively aligned and juxtaposed relationship with said print-inducing members so as to effect sequential printing of type character images along each successive line on a medium, but with the character images ultimately being positioned in the serial order in which the input data characters to be printed were received, said logic control circuit comprising: sub-dividable memory means for storing input binary encoded data representative of the characters to be printed at particular positions along a given print line, said memory means having at least two logic controlled and operationally distinct storage areas, and including means for selectively storing input character data in and reading said data out of said storage areas in a manner that allows incoming data intended for printing on one line to be stored in one of said distinct storage areas while any previously received data is still being read out of the other storage area, processed and printed in the preceding line, means for generating type character font data in multiple phase sequences during each print cycle, said data being representative of and identifying the particular ones of said moving font type characters that are respectively brought into registry with associated ones of said character print-inducing members at any particular point in time during each phase sequence, and means for processing any stored character data for printing after having been read out of said memory means, by comparing said stored data with said generated type character data, and for generating a distinct print signal, in response to each valid equal signal comparison, for use in actuating at the proper time the particular one of an associated character print-inducing member that will effect the printing of a character image representative of the compared type character at the proper position along a given print line.

Claim 3

A print control logic circuit in accordance with claim 1 wherein said memory means includes a free-running memory, and phase controlled type character position and print column counter means for logically controlling access to and sub-dividing said memory into distinct dual storage areas.

Claim 4

A print control logic circuit in accordance with claim 1 wherein said circuit is sub-divided into a plurality of essentially identical, but interconnected data processing circuit modules, each circuit module including separate ones of said memory means, character generating means and comparing means, and with each circuit module being assigned to process print data for a pre-determined number of print columns forming only a sub-group out of the total number of print columns defining the length of a given print line, with each circuit module thereby storing, processing and effecting the printing of input data characters as received in only the print columns assigned thereto. 4. A print control logic circuit in accordance with claim 2 wherein said memory means further includes memory recovery circuit means for detecting the presence of and effecting both the erasing of any invalid data characters stored in said memory during the printing of each print line, and the printing of error symbols therefore.

Claim 5

A print control logic circuit in accordance with claim 2 wherein said memory means further includes: presettable strap-option circuit means coupled to said associated memory for detecting the presence of and purging said memory of any invalid data characters stored therein whenever such characters represent an encoded binary number higher than a preset number representative of the highest order character in a chosen font of type characters employed in a given application.

Claim 6

A print control logic circuit in accordance with claim 5 further comprising: an auxiliary invalid character recovery circuit associated with said memory means and being capable of detecting any invalid data characters stored in said memory means, and for optionally erasing said invalid characters independently of said strap-option circuit means, regardless of the length of a given character font employed in conjunction therewith, after a predetermined time delay that is chosen to be greater than the time required for the number of different type character fonts employed to successively pass a given reference point of the printer, and for thereafter causing each equal character-signal comparison representative of an invalid data character to effect the actuation of the proper print-inducing member at the proper time when an error symbol character included in a given font of type characters is momentarily brought into register therewith and, thereby, effect the printing of an error symbol.

Claim 7

A print control logic circuit in accordance with claim 3 wherein said memory means of each of said circuit modules further includes means for selectively generating first and second storage signals and first and second processing signals for controlling the loading of encoded data characters in and the readout thereof from the first and second storage areas of said memory means in a selective manner.

Claim 8

A print control logic circuit in accordance with claim 7 wherein the generated storage and processing signals are associated with the same storage areas of the memory means unless input data characters are received for storage after one storage area of said memory means has been filled, but the processing and printing of that data has not been completed.

Claim 9

A print control logic circuit in accordance with claim 3 wherein each of said memory means includes a free-running storage memory and phase-controlled type character position and print column counter means for logically controlling selective access to and sub-dividing said memory into dual storage areas, and wherein each of said circuit modules further comprises: memory recovery circuit means for detecting the presence of and effecting the erasing of any invalid data characters stored in said associated memory during the printing of each print line, and for effecting the printing of error symbols therefor.

Claim 10

A print control logic circuit in accordance with claim 9 wherein each of said circuit modules further comprises: circuit means for generating line stacking control signals for over-riding the normal operation of said associated memory so as to allow character data received at a rate faster than the printer can print the data stored in a first storage area of said memory, for a given line, to be temporarily stored in the second of said storage areas for not only the adjacent print line, but for any succeeding line thereafter until said second storage area has been filled, subject to any data for any line after the adjacent line, having not been previously transferred to said first storage area in the normal manner upon the processing and printing of the previously stored character data therein having been completed.

Claim 11

A print control logic circuit in accordance with claim 9 wherein said memory recovery circuit means in each of said circuit modules comprises presettable strap-option circuit means coupled to said associated memory for detecting the presence of and purging said memory of any invalid data characters stored therein whenever such characters represent an encoded binary number higher than a preset number representative of the highest order character in a chosen font of type characters employed in a given application.

Claim 12

A print control logic circuit in accordance with claim 11 wherein each of said circuit modules further comprises: an auxiliary invalid character recovery circuit capable of detecting any invalid data characters stored in said associated memory, and for erasing said invalid characters independently of said strap-option circuit means, regardless of the length of a given character font employed in conjunction therewith, after a predetermined time-delay that is chosen to be greater than the time required for the number of different type character fonts employed to successively pass a given reference point on the printer, and for thereafter causing each equal character signal comparision representative of an invalid data character to effect the actuation of the proper print-inducing member at the proper time when an error symbol character included in a given font of type characters is momentarily brought into register therewith, thereby effecting the printing of an error symbol.

Claim 13

A print control logic circuit in accordance with claim 9 wherein each of said processing circuit modules further includes: pulse-stretching means associated with the comparing and print signal generating means so as to allow said print signals to be respectively and selectively generated for a longer time period than is encompassed by the predetermined number of sub-scan periods defining a given print cycle.

Claim 14

A print control logic circuit in accordance with claim 9 wherein each of said processing circuit modules further includes: means for genrating timing pulses in response to and dependent on the rate of speed at which each type character font moves past the print columns, to operate the circuitry in each circuit module in a manner which maintains a continuous synchronous relationship between the font type character signals generated and the read out of stored data characters from the associated memory during each sub-scan period, said timing pulses being transmitted in succession to the serially connected circuit modules.

Claim 15

A print control logic circuit in accordance with claim 14 wherein each of said circuit modules further includes: means for generating an own circuit full status signal whenever a given storage area of said memory has been filled with data characters to be printed, and shift register means, responsive to said timing pulses, for effecting the multiplexing of said timing pulses with said own full status signals, and for transmitting said pulses and signals to the next succeeding circuit module, but in a manner contingent upon all of the data characters to be stored, processed and printed by each preceding circuit module having been received and, as a result thereof, having generated its own circuit full status signal and then multiplexed that signal with a previously received timing pulse and transmitted both to the next succeeding circuit module which similarly responds thereto, in serial fashion.

Claim 16

A print control logic circuit in accordance with claim 14 wherein each of said processing circuit modules further includes: means responsive to externally controlled signal stimulus for allowing each circuit module to receive, store and process character print data for any selected number of assigned print columns less than the maximum number of print columns that may be assigned to each circuit module by circuit design.

Claim 17

A print control logic circuit in accordance with claim 12 wherein each oF said circuit modules further includes: pulse-stretching means associated with the comparing and print signal generating means so as to allow said print signals to be respectively and selectively generated for a longer time period than is encompassed by the predetermined number of sub-scan periods defining a given print cycle, and means for generating timing pulses in response to and dependent on the rate of speed of each character font in moving past the print columns, to operate the circuitry in each circuit module in a manner that maintains a continuous synchronous relationship between the font type character signals generated and the read out of stored data characters from the associated memory during each sub-scan period, said timing pulses being transmitted in succession to the serially connected circuit modules.

Claim 18

A print control logic circuit in accordance with claim 17 wherein each of said circuit modules further includes: means for generating an own circuit full status signal whenever a given storage area of said memory has been filled with data characters to be printed, shift register means, responsive to said timing pulses, for effecting the multiplexing of said timing pulses with said own full status signals, and for transmitting said pulses and signals to the next succeeding circuit module, but in a manner contingent upon all of the data characters to be stored, processed and printed by each preceding circuit module having been received and, as a result thereof, having generated its own circuit full status signal and then multiplexed that signal with a previously received timing pulse and transmitted both to the next succeeding circuit module which similarly responds thereto, in serial fashion, and means responsive to external signal stimulus for allowing each circuit module to receive, store, and process character print data for any selected number of assigned print columns less than the maximum number of print columns that may be assigned to each circuit module by circuit design.

Claim 19

A print control logic circuit for use in on-the-fly impact printers, for selectively actuating one or more out of a plurality of character print-inducing members whenever selective type characters forming a part of a continuously moving font of type characters are momentarily brought into respectively aligned and juxtaposed relationship with said print-inducing members so as to effect sequential printing of type character images along each successive line on a medium, but with the character images ultimately being positioned in the serial order in which the input data characters to be printed were received, said logic control circuit comprising: a plurality of essentially identical, but interconnected data processing circuit modules, each one being assigned to process print data for a pre-determined number of print columns forming only a sub-group out of the total number of print columns defining the length of a given print line, with each circuit module thereby storing, processing and effecting the printing of input data characters as received in only the print columns assigned thereto, each of said circuit modules including: sub-dividable memory means for storing input binary encoded data representative of the characters to be printed at particular positions along a given print line, said memory means including a free-running storage memory having two logic controlled storage areas, and further including phase controlled logic circuit means for selectively storing input character data in and reading said data out of said storage areas in a manner that allows incoming data intended for printing on one line to be stored in one of said distinct storage areas while any previously received data is still being read out of the other storage area, processed and printed in the preceding line, said phase controlled circuit means including a phase counter, a type character position counter and a print column counter to control the selective loading of data Characters in and their read out from the two storage areas of said memory, means for generating type character data in multiple phase sequences during each print cycle, said data being representative of and identifying the particular ones of said moving font type characters that are respectively brought into registry with associated ones of said character print-inducing members at any particular point in time during each phase sequence, and means for processing said stored data for printing after it has eeen selectively read out of said storage areas of said memory, by comparing it with said generated type character data, and for generating a distinct print signal, in response to each valid equal signal comparison, for use in actuating at the proper time the particular one of the associated character print-inducing members that will effect the printing of a character image representative of the compared type character at the proper position along a given print line.

Claim 20

A print control logic circuit for use in on-the-fly impact printers, for selectively actuating one or more out of a plurality of character print-inducing members whenever selective type characters forming a part of a continuously moving font of type characters are momentarily brought into respectively aligned and juxtaposed relationship with said print-inducing members so as to effect sequential printing of type character images along each successive line on a medium, but with the character images ultimately being positioned in the serial order in which the input data characters to be printed were received, said logic control circuit comprising: a plurality of essentially identical, but interconnected data processing circuit modules, each one being assigned to process print data for a pre-determined number of print columns forming only a sub-group out of the total number of print columns defining the length of a given print line, with each circuit module thereby storing, processing and effecting the printing of input data characters as received in only the print columns assigned thereto, each of said circuit modules including: sub-dividable memory means for storing input binary encoded data representative of the characters to be printed at particular positions along a given print line, said memory means including a free-running storage memory having two logic controlled storage areas, and further including phase controlled logic circuit means for selectively storing input character data in and reading said data out of said storage areas in a manner that allows incoming data intended for printing on one line to be stored in one of said distinct storage areas while any previously received data is still being read out of the other storage area, processed and printed in the preceding line, said phase controlled circuit means including a phase counter, a type character position counter and a print column counter to control the selective loading of data Characters in and their read out from the two storage areas of said memory, means for generating type character data in multiple phase sequences during each print cycle, said data being representative of and identifying the particular ones of said moving font type characters that are respectively brought into registry with associated ones of said character print-inducing members at any particular point in time during each phase sequence, and means for processing said stored data for printing after it has eeen selectively read out of said storage areas of said memory, by comparing it with said generated type character data, and for generating a distinct print signal, in response to each valid equal signal comparison, for use in actuating at the proper time the particular one of the associated character print-inducing members that will effect the printing of a character image representative of the compared type character at the proper position along a given print line.

Claim 21

A print control logic circuit in accordance with claim 18 wherein each of said circuit modules further includes: means for generating timing pulses in response to and dependent on the rate of speed at which each type character font moves past the print columns to operate the circuitry in each circuit module in a manner that maintains a continuous synchronous relationship between the font character signals generated and the read out of stored data characters from the associated memory during each sub-scan period, said timing pulses being transmitted in succession to the serially connected circuit modules, memory recovery circuit means for detecting the presence of and effecting the erasing of any invalid data characters stored in said associated memory during the printing of each print line, and for effecting the printing of error symbols therefor, means for selectively generating first and second storage signals and first and second processing signals, for controlling the loading of encoded data characters in and the read out thereof from the first and second storage areas of said memory in a selective manner, and pulse-stretching means associated with the comparing and print signal generating means so as to allow said print signals to be respectively and selectively generated for a longer time period than is encompassed by the predetermined number of sub-scan periods defining a given print cycle.

Claim 22

A print control logic circuit in accordance with claim 20 wherein each of said memory recovery circuit means comprises presettable strap-option circuit means coupled to said associated memory for detecting the presence of and purging said memory of any invalid data characters stored therein whenever such characters represent an encoded binary number higher than a preset number representative of the highest order character in a chosen font of type characters employed in a given application, and wherein each of said circuit modules further comprises: circuit means for generating line stacking control signals for over-riding the normal operation of said associated memory so as to allow character data received at a rate faster than the printer can print the data stored in a first storage area of said memory, for a given print line, to be temporarily stored in the second of said storage areas for not only the adjacent print line, but for any succeeding line thereafter until said second storage area has been filled, subject to any data for any line after the adjacent line, having not been previously transferred to said first storage area in the normal manner upon the processing and printing of the previously stored character data therein having been completed; an auxiliary invalid character recovery circuit capable of detecting any invalid data characters stored in said associated memory, and for optionally erasing said invalid characters independently of said strap-option circuit means, regardless of the length of a given character font employed in conjunction therewith, after A predetermined time-delay that is chosen to be greater than the time required for the number of different type character fonts employed to successively pass a given reference point on th printer, and for thereafter causing each equal character signal comparison representative of an invalid data character proper time when an error symbol character included in a given font of type characters is momentarily brought into register therewith and, thereby, effect the printing of an error symbol, and strap-option circuit means for allowing each circuit module to receive, store and process character print data for any selected number of assigned print columns less than the maximum number of print columns that may be assigned to each circuit module by circuit design.

Claim 23

In a printer mechanism including a moving type carrier having at least one font of characters positioned therealong, a plurality of actuable print-inducing members aligned with the carrier, and an input-output controller for interfacing the incoming encoded print data with the printer, a print control logic circuit for use in generating character print signals to selectively actuate one or more of the print-inducing members out of a plurality of such members when selected ones thereof are periodically and sequentially momentarily aligned with selected and respective ones of said type characters members in accordance with the order in which input data characters are received by the control circuit for subsequent printing, said circuit comprising: sub-divided memory means for storing input binary encoded data representative of the characters to be printed at particular positions along a given print line, said memory means having at least two logic controlled and operationally distinct storage areas, and including means for selectively storing encoded character data in and for reading said data out of said storage areas of said memory means in a manner that allows incoming data intended for printing on one line to be stored in one of said distinct storage areas, while any previously received data is still being read out of the other storage area, processed and printed in the preceding line, means for generating type character font data in a predetermined number of phase sequences during each print cycle, said data being representative of and identifying the particular ones of said font type characters on said continuously moving carrier that are respectively brought into registry with associated ones of said character print-inducing members at any particular point in time, during each phase sequence, the number of said phase sequences being dependent on the relationship between the spacing of adjacent type characters on the carrier and the spacing of print-inducing members, with the spacing of the former being wider and with the number of phase sequences being chosen so as to allow every type character to be brought into alignment with every print-inducing member during a given print cycle, and means for processing any stored character data for printing after it has been read out of said memory means, by comparing said stored data with said generated type character data, and for generating a distinct print signal, in response to each valid equal signal comparison, for use in actuating at the proper time the particular one of the character print-inducing members that will effect the printing of the desired character image representative of the compared type character at the proper position along a given print line in accordance with the order in which the input data characters were received for printing.

Claim 24

In a printer mechanism including a moving type carrier having at least one font of characters positioned therealong, a plurality of actuable print-inducing members aligned with the carrier, and an input-output controller for interfacing the incoming encoded print data with the printer, a print control logic circuit for use in generating character print signals to selectively actuate one or more of the print-inducing members out of a plurality of such members when selected ones thereof are periodically and sequentially momentarily aligned with selected and respective ones of said type characters members in accordance with the order in which input data characters are received by the control circuit for subsequent printing, said circuit comprising: sub-divided memory means for storing input binary encoded data representative of the characters to be printed at particular positions along a given print line, said memory means having at least two logic controlled and operationally distinct storage areas, and including means for selectively storing encoded character data in and for reading said data out of said storage areas of said memory means in a manner that allows incoming data intended for printing on one line to be stored in one of said distinct storage areas, while any previously received data is still being read out of the other storage area, processed and printed in the preceding line, means for generating type character font data in a predetermined number of phase sequences during each print cycle, said data being representative of and identifying the particular ones of said font type characters on said continuously moving carrier that are respectively brought into registry with associated ones of said character print-inducing members at any particular point in time, during each phase sequence, the number of said phase sequences being dependent on the relationship between the spacing of adjacent type characters on the carrier and the spacing of print-inducing members, with the spacing of the former being wider and with the number of phase sequences being chosen so as to allow every type character to be brought into alignment with every print-inducing member during a given print cycle, and means for processing any stored character data for printing after it has been read out of said memory means, by comparing said stored data with said generated type character data, and for generating a distinct print signal, in response to each valid equal signal comparison, for use in actuating at the proper time the particular one of the character print-inducing members that will effect the printing of the desired character image representative of the compared type character at the proper position along a given print line in accordance with the order in which the input data characters were received for printing.

Claim 25

In a printer mechanism in accordance with claim 22, said print control logic circuit being sub-divided into a plurality of essentially identical, but interconnected data processing circuit modules, each circuit module including separate ones of said memory means, character generating means and comparing means, and with each circuit module being assigned to process print data for a pre-determined nuMber of print columns forming only a sub-group out of the total number of print columns defining the length of a given print line, with each circuit module thereby storing, processing and effecting the printing of input data characters as received in only the print columns assigned thereto.

Claim 26

In a printer mechanism in accordance with claim 23, said memory means of each of said circuit modules including a free-running memory, phase controlled type character position means and print column counter means for logically controlling access to and sub-dividing said memory into distinct dual storage areas, and memory recovery circuit means for detecting the presence of and effecting the erasing of any invalid data characters stored in said memory during the printing of each print line.

Claim 27

In a printer mechanism in accordance with claim 24, each of said recovery means of said control circuit further including: presettable strap-option circuit means copuled to said associated memory for detecting the presence of and purging said memory of any invalid data characters stored therein whenever such characters represent an encoded binary number higher than a preset number representative of the highest order character in a chosen font of type characters employed in the printer mechanism, and for thereafter causing each equal character signal comparison representative of an invalid data character to effect the actuation of the proper print-inducing member, corresponding in position to the position in which the invalid data character is stored in the memory, at the proper time when an error symbol type character included in a given font of type characters carried on the carrier is momentarily brought into registry therewith, thereby effecting the printing of an error symbol.

Claim 28

In a printer mechanism in accordance with claim 25, each of said processing circuit modules of said control circuit further including: an auxiliary invalid character recovery circuit capable of detecting any invalid data characters stored in said associated memory, and for optionally erasing said invalid characters independently of said strap-option circuit means, regardless of the length of a given character font employed in said printer mechanism, after a predetermined time-delay that is chosen to be greater than the time required for the number of different type character fonts employed to successively pass a given reference point on the printer, and for thereafter causing each equal signal comparison representative of such an invalid data character to effect the actuation of the proper print-inducing member, corresponding in position to the particular position in which the invalid data character was initially stored in said memory, at the proper time when an error symbol character included in a given font of type characters carried on the carrier is momentarily brought into register therewith, thereby effecting the printing of an error symbol, and pulse-stretching means associated with the comparing and print signal generating means so as to allow said print signals to be respectively and selectively generated for a longer time period than is encompassed by the predetermined number of sub-scan periods defining a given print cycle.

Claim 29

In a printer mechanism including a moving type carrier having at least one font of type characters positioned therealong, a plurality of actuable print-inducing members aligned with the carrier, and an input-output controller for interfacing the incoming encoded print data with the printer mechanism, a print control logic circuit for use in generating print signals to selectively actuate one or more of the print-inducing members out of a plurality of such members when selected ones thereof are periodically and sequentially momentarily aligned with selected and respective ones of said type characters in accordance with the order in which input data characters are received by the control circuit for subsequent printing, said circuit comprising: a plurality oF essentially identical, but interconnected data processing circuit modules, each one being assigned to process print data for a pre-determined number of print columns forming only a sub-group out of the total number of print columns defining the length of a given print line, with each circuit module thereby storing, processing and effecting the printing of input data characters as received in only the print columns assigned thereto, each of said circuit modules including: sub-dividable memory means for storing input binary encoded data representative of the characters to be printed at particular positions along a given print line, said memory means including a free-running storage memory having two logic controlled storage areas, and further including phase controlled logic circuit means for selectively loading input character data in and reading said data out of said storage areas in a manner that allows incoming data intended for printing on one line to be stored in one of said distinct storage areas while any previously received data is still being read out of the other storage area, processed and printed in the preceding line, said phase controlled circuit means including a phase counter, a type character position counter and a print column counter to control the selective loading of data characters in and their read out from the two storage areas of said memory, means for generating type character data in multiple phase sequences during each print cycle, said data being representative of and identifying the particular ones of said moving font type characters that are respectively brought into registry with associated ones of said character print-inducing members at any particular point in time during each phase sequence, and means for processing any stored character data for printing after it has been read out of said free-running memory, by comparing said stored data with said generated type character data, and for generating a distinct print signal in response to each valid signal comparison, for use in actuating at the proper time the particular one of the character print-inducing members that will effect the printing of the desired character image representative of the compared type character at the proper position along a given print line.

Claim 30

In a printer mechanism including a moving type carrier having at least one font of type characters positioned therealong, a plurality of actuable print-inducing members aligned with the carrier, and an input-output controller for interfacing the incoming encoded print data with the printer mechanism, a print control logic circuit for use in generating print signals to selectively actuate one or more of the print-inducing members out of a plurality of such members when selected ones thereof are periodically and sequentially momentarily aligned with selected and respective ones of said type characters in accordance with the order in which input data characters are received by the control circuit for subsequent printing, said circuit comprising: a plurality oF essentially identical, but interconnected data processing circuit modules, each one being assigned to process print data for a pre-determined number of print columns forming only a sub-group out of the total number of print columns defining the length of a given print line, with each circuit module thereby storing, processing and effecting the printing of input data characters as received in only the print columns assigned thereto, each of said circuit modules including: sub-dividable memory means for storing input binary encoded data representative of the characters to be printed at particular positions along a given print line, said memory means including a free-running storage memory having two logic controlled storage areas, and further including phase controlled logic circuit means for selectively loading input character data in and reading said data out of said storage areas in a manner that allows incoming data intended for printing on one line to be stored in one of said distinct storage areas while any previously received data is still being read out of the other storage area, processed and printed in the preceding line, said phase controlled circuit means including a phase counter, a type character position counter and a print column counter to control the selective loading of data characters in and their read out from the two storage areas of said memory, means for generating type character data in multiple phase sequences during each print cycle, said data being representative of and identifying the particular ones of said moving font type characters that are respectively brought into registry with associated ones of said character print-inducing members at any particular point in time during each phase sequence, and means for processing any stored character data for printing after it has been read out of said free-running memory, by comparing said stored data with said generated type character data, and for generating a distinct print signal in response to each valid signal comparison, for use in actuating at the proper time the particular one of the character print-inducing members that will effect the printing of the desired character image representative of the compared type character at the proper position along a given print line.

Claim 31

In a printer mechanism in accordance with claim 27, each of said processing circuit modules of said control circuit further including: means for generating timing pulses in response to and dependent on the rate of speed at which each type character font moves past the print columns, to operate the circuitry in each circuit module in a manner that maintains a continuous synchronous relationship between the font type character signals generated and the read out of stored data characters from the associated memory during each sub-scan period, said timing pulses being transmitted in succession to the serially connected circuit modules, memory recovery circuit means coupled to said associated memory for detecting the presence of and effecting both the erasing of any invalid data characters stored in said memory during the printing of each print line, and the printing of error symbols therefor, and wherein each of said memory means further includes: means for selectively generating first and second storage signals and first and second processing signals, for controlling the loading of encoded data characters in and the read out thereof from the first and second storage areas of said memory in a selective manner.

Claim 32

In a printer mechanism in accordance with claim 28, each of said memory recovery circuit means further comprising presettable strap-option circuit means coupled to said associated memory for detecting the presence of and purging said memory of any invalid data characters stored therein whenever such characters represent an encoded binary number higher than a preset number of representative of the highest order character in a chosen font of type characters employed in a given application, anD wherein each of said circuit modules further comprises: pulse-stretching means associated with the comparing and print signal generating means so as to allow said print signals to be respectively and selectively generated for a longer time period than is encompassed by the predetermined number of sub-scan periods defining a given print cycle.

Claim 33

In a printer mechanism in accordance with claim 29, each of said circuit modules further including: an auxiliary invalid character recovery circuit capable of detecting any invalid data characters stored in said associated memory, and for optionally erasing said invalid characters independently of said strap-option circuit means, regardless of the length of a given character font employed in conjunction therewith, after a predetermined time-delay that is chosen to be greater than the time required for the number of different type character fonts employed to successively pass a given reference point on the printer mechansim, and for thereafter causing each equal character signal comparison representative of an invalid data character to effect the actuation of the proper print-inducing member at the proper time when an error symbol character included in a given font of type characters is momentarily brought into register therewith, thereby effecting the printing of an error symbol, and operable circuit means within each circuit module, responsive to an externally applied signal, for allowing each circuit module to receive, store and process character print data for any selected number of assigned print columns less than the maximum number of print columns that may be assigned to each circuit module by circuit design.