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US3842416A Expired / Lapsed US ⏱️ 0.0 years remaining

Integrating analog-to-digital converter

Assignee: Individual
•
Filing: 1972-05-09
•
Granted: 1974-10-15
•
Expires: 1992-05-09
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Abstract

Abstract An integrating analog-to-digital converter comprising: an analog input signal source, first and second analog reference signal sources, integrating means common to the analog input signal source and the first and second analog reference signal sources, a first analog reference signal from the first analog reference signal source having such a polarity as to increase the integrated output from the integrating means in a positive direction in accordance with the supply of the first analog reference signal to the integrating means and the second analog reference signal from the second analog reference signal source being opposite in polarity to the first analog reference signal, a clock pulse source, a pulse counter, means for supplying the integrating means with an analog input signal from the analog input signal source in a predetermined analog input signal integrating time period determined by a clock pulse from the clock pulse source, means for supplying the integrating means with the second analog reference signal or the first analog reference signal according as the integrated output is positive or negative at the time of completion of the integration of the analog input signal by the integrating means in a first one of n''s reference signal integrating time periods sequentially following the analog input signal integrating time period and determined by the clock pulse, (n being an integer more than 2 and the jth analog reference signal integrating time period being l/2(j-l) times the first one and j 2, 3, . . . n), means for supplying the integrating means with the second analog reference signal or the first analog reference signal according as the integrated output at the time of termination of the (j-l)th analog reference signal integrating time period is positive or negative, and means for supplying the pulse counter with the clock pulse from the clock pulse source in the jth analog reference signal integrating time period when the integrated output from the integrating means at the time of completion of integration of the analog input signal is positive (or negative) and when the integrated output from the integrating means is positive (or negative) at the time of termination of the (j-l)th analog reference signal integrating time period.

Inventors

  • 👤 T Eto

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 04:02
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/50; H03M1/52

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 183 words
An analog to digital converter comprising in combination: a. an integrating amplifier means, b. a source of clock pulses, c. a timing signal generator that produces timing pulses that define for each conversion cycle a series of time intervals the first and second of which are selected portions of a conversion cycle and each of the remainder of which is half the preceding interval, d. means for applying a signal of unknown amplitude and polarity to said integrating amplifier only during the first timing interval of each conversion cycle to obtain an amplifier output representative of the unknown signal, e. means for applying signals of known amplitude and polarity to said amplifier during the second and each of the following time intervals to reduce the amplifier output toward zero, and f. means for counting the clock pulses during those time intervals following the second interval and during only those time intervals in which the polarity of the amplifier output at the start of the interval is the same as the polarity of the amplifier output at the end of said first time interval.
Claim 2
Dependent Claim 183 words
An analog to digital converter comprising in combination: a. an integrating amplifier means, b. a source of clock pulses, c. a timing signal generator that produces timing pulses that define for each conversion cycle a series of time intervals the first and second of which are selected portions of a conversion cycle and each of the remainder of which is half the preceding interval, d. means for applying a signal of unknown amplitude and polarity to said integrating amplifier only during the first timing interval of each conversion cycle to obtain an amplifier output representative of the unknown signal, e. means for applying signals of known amplitude and polarity to said amplifier during the second and each of the following time intervals to reduce the amplifier output toward zero, and f. means for counting the clock pulses during those time intervals following the second interval and during only those time intervals in which the polarity of the amplifier output at the start of the interval is the same as the polarity of the amplifier output at the end of said first time interval.
Claim 3
Dependent Claim 42 words
An analog to digital converter according to claim 1 in which said timing signal generator is controlled by the clock pulse generator and provides timing signals marking the beginning and end of each of said time intervals and of the conversion cycle.
Claim 4
Dependent Claim 58 words
In an analog to digital converter according to claim 1, a flip-flop circuit, means responsive to the polarity of the amplifier output for conditioning the flip-flop circuit, means for triggering the flip-flop circuit from said timing signal generator, and means responsive to the flip-flop circuit for selecting the polarity of the known amplitude signals for each time interval.
Claim 5
Dependent Claim 60 words
In an analog-to-digital converter according to claim 1, a digital indicator and means for supplying the digital indicator with a counted output from the pulse counting means and in which a digital value is indicated by the digital indicator corresponding to the integrated output at the time of completion of integration of the analog input signal with the integrating means.
Claim 6
Dependent Claim 60 words
In an analog to digital converter according to claim 1, a source of supplementary signals of known amplitude and polarity, means connected to said source for applying the supplementary signals to said amplifier during a time interval starting with the start of the second time interval and terminating upon a reversal of the polarity of the output of the amplifier.
Claim 7
Dependent Claim 73 words
In an analog to digital converter according to claim 1 at least one source supplying a supplementary signal of known amplitude and polarity, presettable counting means connected to indicate selected counts of the series of clock pulses of each conversion cycle, and switch means arranged to connect said supplementary source To the amplifier during a time interval determined at least in part by the accumulation of selected counts in said presettable counting means.

References Cited (Backward Citations)

US3267458A Cited
US3368149A Cited
US3525093A Cited
US3480948A Cited
US3500109A Cited
US3564538A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-10-14 1978-04-15 1978-10-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-10-14 1982-04-15 1982-10-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-10-14 1986-04-15 1986-10-15 $7700.00 Window Closed / Lapsed

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