Monolithic stereo decoder

Claim 1

In a monolithic integrated circuit for deriving first and second stereophonically related audio frequency signals from a composite signal including frequency components in the form of the sidebands of a difference combination of said first and second audio frequency signals amplitude modulated on a suppressed carrier wave of given frequency, a sum combination of said first and second audio frequency signals lying in a frequency band lower in frequency than said sidebands and separated therefrom by a frequency gap, and a pilot signal at a frequency equal to one half that of said suppressed carrier wave and which lies in said frequency gap, a phase-locked loop for reconstituting said suppressed carrier comprising, a controlled oscillator adjusted to oscillate nominally at the frequency of said suppressed carrier, frequency dividing means responsive to the signal generated by said oscillator for producing an output signal nominally at the frequency of said pilot signal and having a staircase waveform and a square waveform during alternate half cycles, and detector means responsive to the pilot signal of said composite signal and to the frequency divided output of said controlled oscillator and coupled to said oscillator to lock the frequency thereof to said given frequency, said frequency dividing means comprising flip-flop means having main switch means, gate switch means, clock switch means responsive to the signal generated by said oscillator, and current source means for said main switch means and said gate switch means, said main switch means having firsT and second output current paths, each output current path conducting gate switch means current and main switch means current for one half cycle of the oscillator signal and main switch means current alone for the other half cycle during alternate conduction periods of said main switch means, all under the control of said clock switch means.