Semiconductor device and method of manufacturing same

Claim 1

A METHOD OF M MANUFACTURING A PLURALITY OF DISCRETE SEMICONDUCTOR DEVICES INCLUDING PLURAL REGIONS, COMPRISING PROVIDING A COMMON WAFER OF SEMICONDUCTOR MATERIAL HAVING A SURFACE PORTION OF ONE CONDUCTIVITY TYPE, PROVIDING A FIRST DIFFUSION MASK ON THE WAFER SURFACE, OPENING FIRST WINDOWS IN THE DIFFUSION MASK TO FORM A CONTINOUS GRID OF SCRIBING LANES DEFINING A PLURALITY OF DISCRETE DEVICE AREAS AND OVER A PLURALITY OF DEVICE AREAS SECOND WINDOWS FOR ONE OF THE DEVICE REGIONS, DIFFUSING INTO THE FIRST AND SECOND WINDOWS AN OPPOSITE TUPE FORMING IMPURITY F FORM OPPOSITE TYPE DEVICE REGIONS AND TO FORM AN OPPOSTIE TYPE CONTINUOUS ZONE UNDER THE SCRIBING LANES ULTIMATELY TO CONSTITUTED PERIPHERAL EDGE ZONES OF THE DISCRETE DEVICES, PROVIDING A SECOND DIFFUSION MASK ON THE WAFER SURFACE, OPENING IN THE FIRST AND SECOND DIFFERENT MASKS THIRD WINDOWS LARGER THAN THE FIRST WINDOWS SO AS TO COM-

Claim 2

A METHOD OF M MANUFACTURING A PLURALITY OF DISCRETE SEMICONDUCTOR DEVICES INCLUDING PLURAL REGIONS, COMPRISING PROVIDING A COMMON WAFER OF SEMICONDUCTOR MATERIAL HAVING A SURFACE PORTION OF ONE CONDUCTIVITY TYPE, PROVIDING A FIRST DIFFUSION MASK ON THE WAFER SURFACE, OPENING FIRST WINDOWS IN THE DIFFUSION MASK TO FORM A CONTINOUS GRID OF SCRIBING LANES DEFINING A PLURALITY OF DISCRETE DEVICE AREAS AND OVER A PLURALITY OF DEVICE AREAS SECOND WINDOWS FOR ONE OF THE DEVICE REGIONS, DIFFUSING INTO THE FIRST AND SECOND WINDOWS AN OPPOSITE TUPE FORMING IMPURITY F FORM OPPOSITE TYPE DEVICE REGIONS AND TO FORM AN OPPOSTIE TYPE CONTINUOUS ZONE UNDER THE SCRIBING LANES ULTIMATELY TO CONSTITUTED PERIPHERAL EDGE ZONES OF THE DISCRETE DEVICES, PROVIDING A SECOND DIFFUSION MASK ON THE WAFER SURFACE, OPENING IN THE FIRST AND SECOND DIFFERENT MASKS THIRD WINDOWS LARGER THAN THE FIRST WINDOWS SO AS TO COM-

Claim 6

A method of manufacturing a plurality of discrete semiconductor devices including plural regions, comprising providing a common wafer of silicon semiconductor material having a surface portion of a first conductivity type, providing a relatively thick oxide as a first diffusion mask on the wafer surface, opening first windows in the first diffusion mask to form a continuous grid of scribing lanes defining a plurality of discrete device areas and over a plurality of said device areas second windows for one of the device regions, diffusing into the first and second windows second conductivity type forming impurities to form second type device regions and to form a second type continuous zone under the scribing lanes ultimately to constitute peripheral edge zones of the discrete devices, providing a relatively thinner insulator as a second diffusion mask on the wafer surface and also extending over the first diffusion mask, opening in the first and second diffusion masks third windows larger than the first windows so as to completely encompass and overlap the grid of second type zones under the scribe lanes and over a plurality of the second type device regions fourth windows in the second diffusion mask for another of the device regions, diffusing into the third and fourth windows first conductivity type forming impurities to form first type device regions nested in the second type device regions and to form under the scribing lanes first type continuous zones that completely overlap the edge zones and are more closely spaced to the second type device regions than are the edge zones, removing insulating material formed over the scribe lanes, thereafter scribing the wafer along the scribe lanes, and thereafter severing the wafer along the scribe lanes to form discrete devices each comprising a continuous annular edge zone of the second type and an overlapping wider annular zone of the first type both extending to the severed edges.

Claim 7

A method of manufacturing a plurality of discrete semiconductor devices including plural regions, comprising providing a common wafer of silicon semiconductor material having a surface portion of a first conductivity type, providing a relatively thick oxide as a first diffusion mask on the wafer surface, opening first windows in the first diffusion mask to form a continuous grid of scribing lanes defining a plurality of discrete device areas and over a plurality of said device areas second windows for one of the device regions, diffusing into the first and second windows second conductivity type forming impurities to form second type device regions and to form a second type continuous zone under the scribing lanes ultimately to constitute peripheral edge zones of the discrete devices, providing a relatively thinner insulator as a second diffusion mask on the wafer surface and also extending over the first diffusion mask, opening in the first and second diffusion masks third windows larger than the first windows so as to completely encompass and overlap the grid of second type zones under the scribe lanes and over a plurality of the second type device regions fourth windows in the second diffusion mask for another of the device regions, diffusing into the third and fourth windows first conductivity type forming impurities to form first type device regions nested in the second type device regions and to form under the scribing lanes first type continuous zones that completely overlap the edge zones and are more closely spaced to the second type device regions than are the edge zones, removing insulating material formed over the scribe lanes, thereafter scribing the wafer along the scribe lanes, and thereafter severing the wafer along the scribe lanes to form discrete devices each comprising a continuous annular edge zone of the second type and an overlapping wider annular zone of the first type both extending to the severed edges.