Patent US3836997A successfully refreshed from Google Patents.
US3836997A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor darlington circuit
Assignee: RCA Corp
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Filing: 1973-09-26
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Granted: 1974-09-17
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Expires: 1993-09-26
Abstract
Abstract A semiconductor integrated Darlington circuit is provided including an input transistor driving an output transistor, two resistors, and a diode within a body of semiconductor material. The emitter and base regions of the transistors extend to a surface of the body, and, at such surface, the base region of the input transistor is surrounded by the emitter region thereof while a portion of the base region of the output transistor is disposed between the emitter regions of the two transistors. For increasing the resistance between the base regions of the two transistors, a slot is provided through the surface at a position within the emitter region of the input transistor and between the base regions of the two transistors.
Inventors
- 👤 W Einthoven
- 👤 W Schilp
- 👤 A Todd
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 22:16
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/602; H10; H10D; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H10D84/641; H10D84/642; H10W; H10W20/00; H10W20/40
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
159 words
A semiconductor integrated circuit comprising: a body of semiconductor material having a surface, various regions within said body forming emitter, base, and collector regions of two transistors, said emitter and base regions extending into said body from said surface, portions of said base regions underlying said emitter regions within said body, and said collector region underlying said base region portions, a first base region of one of said transistors separating, at said surface, the emitter regions of said two transistors, and a second base region of the other of said transistors being separated, at said surface, from said first base region by a first emitter region of said other transistor, and a slot in said body between said first and said second base regions, said slot being surrounded, at said surface, by said first emitter region but separated therefrom by a third base region of said other transistor, and said slot extending from said surface into said collector region.
Claim 2
Dependent Claim
159 words
A semiconductor integrated circuit comprising: a body of semiconductor material having a surface, various regions within said body forming emitter, base, and collector regions of two transistors, said emitter and base regions extending into said body from said surface, portions of said base regions underlying said emitter regions within said body, and said collector region underlying said base region portions, a first base region of one of said transistors separating, at said surface, the emitter regions of said two transistors, and a second base region of the other of said transistors being separated, at said surface, from said first base region by a first emitter region of said other transistor, and a slot in said body between said first and said second base regions, said slot being surrounded, at said surface, by said first emitter region but separated therefrom by a third base region of said other transistor, and said slot extending from said surface into said collector region.
Claim 3
Dependent Claim
40 words
An integrated circuit as in claim 1 including a metal contact on said surface, said contact connecting together said first emitter region and said first base region, and said metal contact being disposed in general surrounding relation with said slot.
Claim 4
Dependent Claim
30 words
A semiconductor integrated circuit as in claim 2 including a second emitter region of said other transistor substantially surrounding, at said surface, said first base region of said one transistor.
Claim 5
Dependent Claim
30 words
An integrated circuit as in claim 1 in which the surface conductivity of said third base region is less than that of one of said first and second base regions.
References Cited (Backward Citations)
US3624454A
Cited
US3751726A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-09-16 | 1978-03-18 | 1978-09-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-09-16 | 1982-03-18 | 1982-09-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-09-16 | 1986-03-18 | 1986-09-17 | $7700.00 | Window Closed / Lapsed |