Transistor switching network with reduced dissipation

Claim 2

A transistor switching network comprising: a. a source of DC potentials, b. a load, c. a source of periodic timing waveforms having a limited rise time and of specified frequency, d. a power transistor having base, emitter and collector electrodes, connected to conduct current from said DC source to said load, said periodic waveform being coupled between said base and emitter electrodes to periodically start and stop said conduction, said transistor exhibiting appreciable stored charge at said frequency, and e. means to reduce dissipation in said transistor during switching comprising a current transformer regeneratively coupling said collector current to said base to steepen the turn-on and turn-off portions of said conduction cycle, said current transformer comprising collector current and base current carrying conductors inductively linked by a small saturable core of restricted volt time area to restrict said period of regeneration to the switching intervals and of a magnetic material having a sufficiently low, high frequency cut-off to hold the maximum inverse switching transients below the base emitter breakdown of said transistor.

Claim 3

A transistor switching network as set forth in claim 1 wherein said saturable core is a closed loop of ferrite.

Claim 4

A transistor switching network as set forth in claim 1 wherein a. said source of DC potentials is a pair of series connected capacitors recurrently charged from the AC source through a pair of diodes in a voltage doubling configuration; wherein b. said load is coupled through a diode to the junction of said capacitors and to the other terminal of one capacitor; and wherein c. the collector of said transistor is coupled to the free terminal of said other capacitor and the emitter of said transistor is coupled to the connection of said load and diode for providing intermittent current conduction from said DC source to said load, the potential across said load being a function of the percentage of transistor conduction time.

Claim 5

A transistor switching network comprising: a. a source of DC potentials, b. a load, c. a source of periodic timing waveforms, having a limited rise time and of specified frequency, d. a pair of power transistors each having base, emitter and collector electrodes connected to conduct current from said DC source to said load, said periodic waveform being coupled between said base and emitter electrodes to cause alternate conduction of said power transistors, said transistors exhibiting appreciable stored charge at said frequency, and e. means to reduce dissipation in said transistors during switching comprising a first current transformer regeneratively coupling the collector current of one transistor to the base of the other transistor, and a second current transformer regeneratively coupling the collector current of said other transistor to the base of said one transistor to steepen the turn-on and turn-off portions of said conductive cycle; said current transformers each comprising collector current and base current carrying conductors inductively linked by a small saturable core of restricted volt time area to restrict said period of regeneration to the switching intervals and of a magnetic material having a sufficiently low, high frequency cut-off to hold the maximum inverse switching transients below the base emitter breakdown of said transistors.

Claim 6

A transistor switching network comprising: a. a source of DC potentials, b. a load, c. a source of periodic timing waveforms, having a limited rise time and of specified frequency, d. a pair of power transistors each having base, emitter and collector electrodes connected to conduct current from said DC source to said load, said periodic waveform being coupled between said base and emitter electrodes to cause alternate conduction of said power transistors, said transistors exhibiting appreciable stored charge at said frequency, and e. means to reduce dissipation in said transistors during switching comprising a first current transformer regeneratively coupling the collector current of one transistor to the base of the other transistor, and a second current transformer regeneratively coupling the collector current of said other transistor to the base of said one transistor to steepen the turn-on and turn-off portions of said conductive cycle; said current transformers each comprising collector current and base current carrying conductors inductively linked by a small saturable core of restricted volt time area to restrict said period of regeneration to the switching intervals and of a magnetic material having a sufficiently low, high frequency cut-off to hold the maximum inverse switching transients below the base emitter breakdown of said transistors.

Claim 7

A transistor switching network as set forth in claim 4 wherein said saturable core is a closed loop of ferrite.

Claim 8

A transformer network as set forth in claim 4 wherein said transistors are coupled in push-pull to said load by an output transformer having a first and a second primary winding each respectively connecting a collector to said DC source.

Claim 9

A transistor switching network as set forth in claim 6 wherein said periodic timing waveforms are sinusoidal, and are transformer coupled in push-pull to the bases of said power transistors, said emitters being connected in common.

Claim 10

The combination set forth in claim 7 wherein said output transformer has a magnetic core and a pair of regenerative windings coupled to the bases of said transitors and adjusted to augment the steepness of the switching transients while avoiding self-running operation.

Claim 11

The combination set forth in claim 8 wherein two resistances are provided, each connected in series between the base of each transistor and the associated driving winding to restrict the forward base current in that transistor, said resistances each being shunted by a reversely poled diode to facilitate sweeping out positive charge.

Claim 12

A transformer switching network as set forth in claim 9 wherein a small core is provided encircling the base lead of each power transistor, of a material which as a high frequency roll-off to avoid high frequency instability.