Patent US3831041A successfully refreshed from Google Patents.
US3831041A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Compensating circuit for semiconductive apparatus
Assignee: AT&T Inc
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Filing: 1973-05-03
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Granted: 1974-08-20
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Expires: 1993-05-03
Abstract
Abstract A number of compensating circuits each of which provides an output voltage which differs from an applied input voltage by one or more IGFET threshold voltages. Each circuit typically includes a main IGFET, a load IGFET and one or more bias control IGFETS in the gate branch of either the active or load transistor. Specific compensating circuits adapted for use in the regenerator of a charge transfer device and in a constant current generator are disclosed.
Inventors
- 👤 R Krambeck
- 👤 R Strain
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 17:35
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/301; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; G05F3/242; G11; G11C; G11C19/00; G11C19/28; G11C19/282; G11C19/285; H03K; H03K17/00; H03K17/14; H03K17/145
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
104 words
A circuit comprising a first terminal to which an input voltage to be compensated is to be applied, a second terminal at which a compensated voltage is to be derived, a third terminal which is to be maintained at a reference potential, a main transistor having its source and drain connected between the second and first terminals, respectively, a load transistor having its source and drain connected between the third and second terminals, respectively, and at least one control bias transistor, said control bias transistor having its source connected to the gate of the main transistor and its drain connected to the first termInal.
Claim 2
Dependent Claim
104 words
A circuit comprising a first terminal to which an input voltage to be compensated is to be applied, a second terminal at which a compensated voltage is to be derived, a third terminal which is to be maintained at a reference potential, a main transistor having its source and drain connected between the second and first terminals, respectively, a load transistor having its source and drain connected between the third and second terminals, respectively, and at least one control bias transistor, said control bias transistor having its source connected to the gate of the main transistor and its drain connected to the first termInal.
Claim 3
Dependent Claim
65 words
A circuit in accordance with claim 1 characterized in that it includes a second control bias transistor, the first bias control transistor having its source connected to the gate of the main transistor and its drain to the first terminal, and the second bias control transistor having its source connected to the gate of the load transistor and its drain connected to the second terminal.
Claim 4
Dependent Claim
46 words
A circuit in accordance with claim 1 further characterized in that it includes a second bias control transistor having its source connected to the gate of the first bias control transistor and its gate and drain connected to the drain of the first bias control transistor.
Claim 5
Dependent Claim
150 words
A circuit comprising a first terminal to which an input voltage is to be applied, a second terminal to be maintained at a reference potential, a control node, a third terminal at which a current is to be derived, a first transistor having its drain and gate connected to the first terminal and its source to the control node, a second transistor having its gate and drain connected to the control node, a third transistor having its gate connected to the source of the second transistor and its drain to the control node, a fourth transistor having its gate connected to the source of the third transistor, its drain to the control node and its source to the second terminal, and a fifth transistor having its gate connected to the control node, its source to a point to be maintained at reference potential, and its drain to the third terminal.
Claim 6
Dependent Claim
150 words
A circuit comprising a first terminal to which an input voltage is to be applied, a second terminal to be maintained at a reference potential, a control node, a third terminal at which a current is to be derived, a first transistor having its drain and gate connected to the first terminal and its source to the control node, a second transistor having its gate and drain connected to the control node, a third transistor having its gate connected to the source of the second transistor and its drain to the control node, a fourth transistor having its gate connected to the source of the third transistor, its drain to the control node and its source to the second terminal, and a fifth transistor having its gate connected to the control node, its source to a point to be maintained at reference potential, and its drain to the third terminal.
Claim 7
Dependent Claim
131 words
A monolithic circuit comprising a first terminal to which an input voltage is to be applied, a second terminal to be maintained at a reference potential, a third terminal at which an output is to be derived, first, second, third, and fourth transistors, the first transistor having its source connected to the third terminal, its drain connected to the first terminal, and its gate connected to the source of the second transistor, the second transistor additionally having its drain connected to the first terminal and its gate connected to the source of the third transistor, the third transistor additionally having its gate and drain connected to the first terminal, and the fourth transistor having its source connected to the second terminal and its gate and drain connected to the third terminal.
Claim 8
Dependent Claim
131 words
A monolithic circuit comprising a first terminal to which an input voltage is to be applied, a second terminal to be maintained at a reference potential, a third terminal at which an output is to be derived, first, second, third, and fourth transistors, the first transistor having its source connected to the third terminal, its drain connected to the first terminal, and its gate connected to the source of the second transistor, the second transistor additionally having its drain connected to the first terminal and its gate connected to the source of the third transistor, the third transistor additionally having its gate and drain connected to the first terminal, and the fourth transistor having its source connected to the second terminal and its gate and drain connected to the third terminal.
Claim 9
Dependent Claim
85 words
A circuit comprising a first terminal to which an input voltage is to be applied for compensation, a second terminal at which a compensated voltage may be derived, first and second transistors, the first having its drain and gate connected to the first terminal and its source connected to the gate of the second transistor, the second transistor having its drain connected to the first terminal and its source to the second terminal, and circuit means for delivering current to said second terminal as needed.
Claim 10
Dependent Claim
85 words
A circuit comprising a first terminal to which an input voltage is to be applied for compensation, a second terminal at which a compensated voltage may be derived, first and second transistors, the first having its drain and gate connected to the first terminal and its source connected to the gate of the second transistor, the second transistor having its drain connected to the first terminal and its source to the second terminal, and circuit means for delivering current to said second terminal as needed.
Claim 11
Dependent Claim
128 words
A circuit in accordance with claim 6 further characterized in that the current delivering means comprises first and second capacitors, third and fourth terminals, and third and fourth transistors, the first capacitor having one electrode connected to the second terminal and the other to a point adapted to be a reference potential, the third transistor having its drain connected to the second terminal, its source to the drain of the fourth transistor and its gate to the third terminal, the second capacitor having one electrode connected to the drain of the fourth transistor and its other to a point adapted to be at reference potential, the fourth transistor having its source connected to a point adapted to be at reference potential, and its gate to the fourth terminal.
Claim 12
Dependent Claim
103 words
A circuit comprising a first terminal to which an input voltage to be compensated is to be applied, a second terminal at which a compensated voltage is to be derived, a third terminal which is to be maintained at a reference potential, a main transiStor having its source and drain connected between the second and first terminals, respectively, a load transistor having its source and drain connected between the third and second terminals, respectively, and at least one control bias transistor, said control bias transistor having its source connected to the gate of the load transistor and its drain to the second terminal.
Claim 13
Dependent Claim
103 words
A circuit comprising a first terminal to which an input voltage to be compensated is to be applied, a second terminal at which a compensated voltage is to be derived, a third terminal which is to be maintained at a reference potential, a main transiStor having its source and drain connected between the second and first terminals, respectively, a load transistor having its source and drain connected between the third and second terminals, respectively, and at least one control bias transistor, said control bias transistor having its source connected to the gate of the load transistor and its drain to the second terminal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-08-19 | 1978-02-18 | 1978-08-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-08-19 | 1982-02-18 | 1982-08-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-08-19 | 1986-02-18 | 1986-08-20 | $7700.00 | Window Closed / Lapsed |