Interlayer interconnection technique

Claim 1

An interconnection substrate for electrical circuits comprising: a. a dielectric body including a plurality of layers, b. a plurality of substantially planar metallized patterns disposed within said body between at least some of said layers, and at least a pair of planar metallized patterns being in confronting relationship, c. a plurality of metallic conductive paths extending through said body and being disposed substantially normal to said planar metallized patterns, at least some of said conductive paths being connected to at least one of said planar metallized patterns, at least one of said conductive paths comprising a plurality of separate studs joining one another end to end, and d. diffused integral metallurgical bonds between at least some of said studs, said metallurgical bonds comprising a system of the metal constituted by said studs and another metal having a significantly lower melting point than the metal of the conductive paths, and an additional diffused integral metallurigcal bond between said pair of confronting planar metallized patterns, comprising a system of the metal consisting of the planar metallized pattern and additional quantities of said another metal.

Claim 9

A method for forming an interconnection substrate for electrical circuits comprising the steps of: a. forming a plurality of planar sections, each section comprising a dielectric material having a plurality of conductive paths forming a grid therethrough, forming planar metallized patterns on selected ones of said sections, and disposing selectively said metallized patterns in electrical contact with said grid of conductive paths. b. applying liquid gallium at selected interfaces intermediate conductive paths of adjacent mated sections to form conductive paths between said sections, and selectively applying liquid gallium between a first adjacent pair of planar metallized patterns, c. exposing said sections to heat for forming a plurality of diffused metallurgical bonds at said interfaces, and for forming a first diffused integral metallurgical bond between said pair of adjacent metallized patterns, said metallurgical bonds providing structural integrity as well as an electrical path, and said heating step being effective to join said segmented sections into a unitary body.

Claim 10

A method for forming an interconnection substrate for electrical circuits comprising the steps of: a. forming a plurality of planar sections, each section comprising a dielectric material having a plurality of conductive paths forming a grid therethrough, forming planar metallized patterns on selected ones of said sections, and disposing selectively said metallized patterns in electrical contact with said grid of conductive paths. b. applying liquid gallium at selected interfaces intermediate conductive paths of adjacent mated sections to form conductive paths between said sections, and selectively applying liquid gallium between a first adjacent pair of planar metallized patterns, c. exposing said sections to heat for forming a plurality of diffused metallurgical bonds at said interfaces, and for forming a first diffused integral metallurgical bond between said pair of adjacent metallized patterns, said metallurgical bonds providing structural integrity as well as an electrical path, and said heating step being effective to join said segmented sections into a unitary body.