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US3828136A Expired / Lapsed US ⏱️ 0.0 years remaining

Time division telephone switching exchange

Assignee: Italtel SpA
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Filing: 1972-06-15
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Granted: 1974-08-06
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Expires: 1992-06-15
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Abstract

Abstract A TDM telephone exchange serving a multiplicity of subscriber lines has a primary and a secondary processor each including a caller memory, a responder memory and a monitoring memory, stepped in synchronism through a multiplicity of phases including service phases for the establishment of a connection and conversation phases for enabling communication between two subscribers. The associated subscriber lines are periodically scanned in successive memory cycles; the address of any such subscriber found to be in the process of initiating the call, if not yet entered in a phase of the caller or the responder memory of either processor as determined during a service phase, is entered in the first available conversation phase of either caller memory whereupon the address of the called subscriber is registered in the corresponding phase of the associated responder memory to let the conversation proceed under the control of appropriate entries in the monitoring memory of the same processor. If the first vacant phases of the two caller memories coincide, preference is given to the memory of the first processor. If a fault develops in either processor, the other one is used on all calls. With subscriber lines arranged in groups along common branches of two main signal paths, entry in a vacant phase of either caller memory is possible only if the concurrent phases of the caller and responder memories of the other processor do not carry the address of another subscriber of the same group; otherwise, the address of the new caller is transferred to the next available phase not subject to this restriction.

Inventors

  • 👤 A Perna
  • 👤 G Valbonesi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 20:16
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/04; H04Q11/0407

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 400 words
In an exchange for a time-division-multiplex communication system serving a multiplicity of subscriber lines identified by individual addresses, in combination: a primary and a secondary processor each including a circulating caller memory, a circulating responder memory and a circulating monitoring memory, each of said memories being divided into a predetermined number of service phases and conversation phases representing respective time slots in a recurrent memory cycle, the conversation phases of said caller and responder memories serving for the storage of addresses of subscriber lines initiating a call or engaged in a conversation, the conversation phases of said monitoring memory serving for the storage of data relating to a call initiated or in progress from a subscriber line whose address is entered in a corresponding conversation phase of the associated caller memory; timing means for stepping all memories of both processors in synchronism through consecutive memory cycles; scanning means in each processor for periodically sampling said subscriber lines in a service phase of successive memory cycles and ascertaining the activity thereof; test means responsive to said scanning means for determining the absence of an entry of the address of an active subscriber line in any conversation phase of each caller and responder memory; first allocation means in each processor controlled by the associated monitoring memory for entering the address of any previously unentered active subscriber line in the first free conversation phase of the associated caller memory; preference means controlled by both monitoring memories for inhibiting the entry of an address in the first free conversation phase of the caller memory of said secondary processor upon a coincidence of said first free conversation phase with a first free conversation phase of the caller memory of said primary processor; malfunction-detecting means responsive to a fault indication from either processor for limiting the operation of said first allocation means to the caller memory of the other processor, sadi preference means being ineffectual upon the occurrence of a fault indication from said primary processor; and second allocation means responsive to entry in a conversation phase of either monitoring memory, corresponding to a phase allocated in the associated caller memory to an active subscriber line, of an identification of a called subscriber line for entering the address of the latter subscriber line in the corresponding phase of the associated responder memory preparatorily to the establishment of a connection between the two subscriber lines so entered.
Claim 2
Dependent Claim 400 words
In an exchange for a time-division-multiplex communication system serving a multiplicity of subscriber lines identified by individual addresses, in combination: a primary and a secondary processor each including a circulating caller memory, a circulating responder memory and a circulating monitoring memory, each of said memories being divided into a predetermined number of service phases and conversation phases representing respective time slots in a recurrent memory cycle, the conversation phases of said caller and responder memories serving for the storage of addresses of subscriber lines initiating a call or engaged in a conversation, the conversation phases of said monitoring memory serving for the storage of data relating to a call initiated or in progress from a subscriber line whose address is entered in a corresponding conversation phase of the associated caller memory; timing means for stepping all memories of both processors in synchronism through consecutive memory cycles; scanning means in each processor for periodically sampling said subscriber lines in a service phase of successive memory cycles and ascertaining the activity thereof; test means responsive to said scanning means for determining the absence of an entry of the address of an active subscriber line in any conversation phase of each caller and responder memory; first allocation means in each processor controlled by the associated monitoring memory for entering the address of any previously unentered active subscriber line in the first free conversation phase of the associated caller memory; preference means controlled by both monitoring memories for inhibiting the entry of an address in the first free conversation phase of the caller memory of said secondary processor upon a coincidence of said first free conversation phase with a first free conversation phase of the caller memory of said primary processor; malfunction-detecting means responsive to a fault indication from either processor for limiting the operation of said first allocation means to the caller memory of the other processor, sadi preference means being ineffectual upon the occurrence of a fault indication from said primary processor; and second allocation means responsive to entry in a conversation phase of either monitoring memory, corresponding to a phase allocated in the associated caller memory to an active subscriber line, of an identification of a called subscriber line for entering the address of the latter subscriber line in the corresponding phase of the associated responder memory preparatorily to the establishment of a connection between the two subscriber lines so entered.
Claim 3
Dependent Claim 214 words
The combination defined in claim 1 wherein said subscriber lines are divided into groups along common branches of two parallel paths respectively linking same with said processors, further comprising check means for preventing entry of the address of a previously unentered subscriber line by said first allocation means in a free conversation phase of the caller memory of either processor in the presence of an address of any commonly grouped subscriber line in a concurrent phase of either of the caller and responder memories of the other processor, and transfer means controlled by said check means and responsive to entry of the address of a called subscriber line in a phase of the responder memory of said one processor by said second allocation means in the presence of an address of a subscriber line commonly grouped with said called line in a concurrent phase of either of the caller and responder memories of said other processor for shifting the addresses of said active and called lines from the first-allocated conversation phase of the caller and responder memories of said one processor to the next free conversation phase of the same memories with no address of a commonly grouped subscriber line in a concurrent phase of the caller and responder memories of the other processor.

References Cited (Backward Citations)

US3161732A Cited
US3557315A Cited
US3657483A Cited
US3643032A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-08-05 1978-02-04 1978-08-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-08-05 1982-02-04 1982-08-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-08-05 1986-02-04 1986-08-06 $7700.00 Window Closed / Lapsed

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