Patent US3828130A successfully refreshed from Google Patents.
US3828130A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Data transmitting system
Assignee: Fuji Electric Co Ltd
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Filing: 1973-04-13
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Granted: 1974-08-06
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Expires: 1993-04-13
Abstract
Abstract A data transmitting system disclosed here belongs to a method defined as a so-called serial data transmitting method for transmitting the data by converting it to a serial binary signal, and is composed as follows: data information is converted into a serial binary signal which is transmitted from the transmitting side to a first circuit of the signal transmission line at the same time an auxiliary signal formed by synthesizing logically the above data information and bit synchronous information synchronous therewith is transmitted to a second circuit of the signal transmission line, the data signals transmitted from the first and second circuits of the above signal transmission line and the auxiliary signal are compared logically so as to extract bit synchronous information at the receiving side; timing signals for extracting a bit are formed by the bit synchronous information signal; and the bit information of the data signal transmitted by way of the first circuit is, under the control of these timing signals extracted simultaneously with the measurement of the time interval of the timing signals and number signals, timing thereby detecting any error in the bit information of the data thus transmitted.
Inventors
- 👤 T Yamaguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 07:42
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/02; H04L7/00; H04L7/04; H04L7/048
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
137 words
A data transmitting system comprising: two signal transmission line circuits; a data transmitting section for converting data information to a serial binary signal to send the signal to said first circuit and for sending an auxiliary signal, formed by logically synthesizing the data information and bit synchronous information, to said second circuit synchronously with said serial binary signal; a data receiving section for extracting a bit synchronous information signal from the data signal transmitted from said first circuit and from the auxiliary signal transmitted from said second circuit to form a timing signal for extracting the bit information signal to subsequently read out, under the control of the binary signal the data signal transmitted from said first circuit and simultaneously to check the content of the extracted bit synchronous information signal to detect any error in transmission.
Claim 2
Dependent Claim
137 words
A data transmitting system comprising: two signal transmission line circuits; a data transmitting section for converting data information to a serial binary signal to send the signal to said first circuit and for sending an auxiliary signal, formed by logically synthesizing the data information and bit synchronous information, to said second circuit synchronously with said serial binary signal; a data receiving section for extracting a bit synchronous information signal from the data signal transmitted from said first circuit and from the auxiliary signal transmitted from said second circuit to form a timing signal for extracting the bit information signal to subsequently read out, under the control of the binary signal the data signal transmitted from said first circuit and simultaneously to check the content of the extracted bit synchronous information signal to detect any error in transmission.
Claim 3
Dependent Claim
150 words
A data transmitting apparatus comprising: two signal transmission line circuits; a data transmitting device including means for converting data information to a serial binary signal and feeding it out to said first circuit, and means for logically synthesizing the data information and the bit synchronous information to form an auxiliary signal and to feed it out to the second circuit; and a data receiving device including: means for logically comparing the data signal transmitted from said first circuit and the auxiliary signal transmitted from said second circuit to extract a bit synchronous information signal; means for forming from the extracted bit synchronous information signal a timing signal for extracting the bit information; means for subsequently reading out, under the control of the timing signal, the data signal transmitted from said first circuit; and means for checking the contents of the extracted bit information signal, thereby detecting any error in transmission.
Claim 4
Dependent Claim
150 words
A data transmitting apparatus comprising: two signal transmission line circuits; a data transmitting device including means for converting data information to a serial binary signal and feeding it out to said first circuit, and means for logically synthesizing the data information and the bit synchronous information to form an auxiliary signal and to feed it out to the second circuit; and a data receiving device including: means for logically comparing the data signal transmitted from said first circuit and the auxiliary signal transmitted from said second circuit to extract a bit synchronous information signal; means for forming from the extracted bit synchronous information signal a timing signal for extracting the bit information; means for subsequently reading out, under the control of the timing signal, the data signal transmitted from said first circuit; and means for checking the contents of the extracted bit information signal, thereby detecting any error in transmission.
Claim 5
Dependent Claim
158 words
A data transmitting apparatus comprising: two signal transmission line circuits; a data transmitting device including: means for converting data information to a serial binary signal and feeding it out to said first circuit, and means for logically synthesizing the data information and the bit synchronous information by way of an exclusive logical ''''or'''' circuit to form an auxiliary signal and to feed it out to said second circuit; and a data receiving device including: means for logically comparing the data signal transmitteD from said first circuit and the auxiliary signal transmitted from said second circuit to extract a bit synchronous information signal; means for forming from the extracted bit synchronous information signal a timing signal for extracting the bit information; means for subsequently reading out, under the control of the timing signal, the data signal transmitted from said first circuit, and means for checking the content of the extracted bit information signal, thereby detecting any error in transmission.
Claim 6
Dependent Claim
158 words
A data transmitting apparatus comprising: two signal transmission line circuits; a data transmitting device including: means for converting data information to a serial binary signal and feeding it out to said first circuit, and means for logically synthesizing the data information and the bit synchronous information by way of an exclusive logical ''''or'''' circuit to form an auxiliary signal and to feed it out to said second circuit; and a data receiving device including: means for logically comparing the data signal transmitteD from said first circuit and the auxiliary signal transmitted from said second circuit to extract a bit synchronous information signal; means for forming from the extracted bit synchronous information signal a timing signal for extracting the bit information; means for subsequently reading out, under the control of the timing signal, the data signal transmitted from said first circuit, and means for checking the content of the extracted bit information signal, thereby detecting any error in transmission.
Claim 7
Dependent Claim
160 words
A data transmitting apparatus comprising: two transmission line circuits; a data transmitting device including means for converting data information to a serial binary signal and feeding it out to said first circuit, and means for logically synthesizing the data information and the bit synchronous information to form an auxiliary signal and feeding it out to said second circuit of said transmission line; and a data receiving device; including means for logically comparing the data signal transmitted from said first circuit and the auxiliary signal transmitted from said second circuit to extract a bit synchronous information signal; means for forming, from the extracted bit synchronous information signal, a timing signal for extracting the bit information; means for subsequently reading out, under the control of the timing signal, the data signal transmitted from the first circuit; and means for counting the number of timing signals, thereby checking the content of the extracted bit synchronous information signal to detect any error in transmission.
Claim 8
Dependent Claim
160 words
A data transmitting apparatus comprising: two transmission line circuits; a data transmitting device including means for converting data information to a serial binary signal and feeding it out to said first circuit, and means for logically synthesizing the data information and the bit synchronous information to form an auxiliary signal and feeding it out to said second circuit of said transmission line; and a data receiving device; including means for logically comparing the data signal transmitted from said first circuit and the auxiliary signal transmitted from said second circuit to extract a bit synchronous information signal; means for forming, from the extracted bit synchronous information signal, a timing signal for extracting the bit information; means for subsequently reading out, under the control of the timing signal, the data signal transmitted from the first circuit; and means for counting the number of timing signals, thereby checking the content of the extracted bit synchronous information signal to detect any error in transmission.
Claim 9
Dependent Claim
181 words
A data transmitting apparatus comprising; two signal transmission line circuits; a data transmitting device including means for converting data information to a serial binary signal and feeding it out to said first circuit, and means for logically synthesizing the data information and the bit synchronous information to form an auxiliary signal and feeding it out to said second circuit; and a data receiving device including: means for logically comparing the data signal transmitted from said first circuit and the auxiliary signal transmitted from said second circuit to extract a bit synchronous information signal; means for forming, from the extracted bit synchronous information signal, timing signals for extracting the bit information; means for subsequently reading out, under the control of the timing signals, the data signal transmitted from said first circuit; and means for measuring the duration of the timing signals and providing an indication of the termination thereof; and means for counting the number of the timing signals until the occurrence of said indication, thereby checking the content of the extracted bit synchronous information signal to detect any error in transmission.
Claim 10
Dependent Claim
181 words
A data transmitting apparatus comprising; two signal transmission line circuits; a data transmitting device including means for converting data information to a serial binary signal and feeding it out to said first circuit, and means for logically synthesizing the data information and the bit synchronous information to form an auxiliary signal and feeding it out to said second circuit; and a data receiving device including: means for logically comparing the data signal transmitted from said first circuit and the auxiliary signal transmitted from said second circuit to extract a bit synchronous information signal; means for forming, from the extracted bit synchronous information signal, timing signals for extracting the bit information; means for subsequently reading out, under the control of the timing signals, the data signal transmitted from said first circuit; and means for measuring the duration of the timing signals and providing an indication of the termination thereof; and means for counting the number of the timing signals until the occurrence of said indication, thereby checking the content of the extracted bit synchronous information signal to detect any error in transmission.
References Cited (Backward Citations)
US3305636A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-08-05 | 1978-02-04 | 1978-08-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-08-05 | 1982-02-04 | 1982-08-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-08-05 | 1986-02-04 | 1986-08-06 | $7700.00 | Window Closed / Lapsed |