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US3826901A Expired / Lapsed US ⏱️ 0.0 years remaining

Time multiplexed rate multiplier

Assignee: HP Inc
•
Filing: 1973-10-12
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Granted: 1974-07-30
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Expires: 1993-10-12
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Abstract

Abstract Outputs from a plurality of pulse counters are time multiplexed in a sequence determined by detection of individual pulse counters being in a selected counting state. The time multiplexed counter outputs control a pulse selector which acts as a gate to rate multiply an applied input signal in response to the time multiplexed counter outputs and control word outputs from a control word source.

Inventors

  • 👤 I Band
  • 👤 Leod K Mac

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 16:19
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/60; G06F7/68

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 304 words
A time multiplexed rate multiplier comprising: a plurality of pulse counters, a first one of the pulse counters receiving an input signal and each of said pulse counters producing outputs corresponding to a number of pulses counted and corresponding to the pulse counter being in a selected counting state; means coupled to each of the pulse counters and responsive to a pulse counter in a less significant counting position producing an output in response to a selected number of pulses counted for activating a pulse counter in a next more significant counting position to accummulate a count; a priority encoder connected to receive the outputs of each of the pulse counters for detecting the pulse counter in the least significant counting position which is not in said selected counting state and for producing a coding signal identifying said pulse counter; a first multiplexer connected to the priority encoder for receiving said coding signal and to the plurality of pulse counters for receiving the outputs of the pulse counters for producing an output only in response to the appearance of said coding signal and an output produced by the pulse counter identified by said coding signal; a source of control words having outputs and producing control words at the outputs; a second multiplexer connected to the priority encoder and outputs of the source of control words for producing an output only in response to an appearance of said coding signal, said output being representative of a control word digit corresponding to said coding signal; and a pulse selector having a plurality of inputs connected to receive the outputs of the first multiplexer and second multiplexer and the input signal for producing an output in response to the appearance at its inputs of the input signal and the outputs of the first multiplexer and second multiplexer.
Claim 2
Dependent Claim 304 words
A time multiplexed rate multiplier comprising: a plurality of pulse counters, a first one of the pulse counters receiving an input signal and each of said pulse counters producing outputs corresponding to a number of pulses counted and corresponding to the pulse counter being in a selected counting state; means coupled to each of the pulse counters and responsive to a pulse counter in a less significant counting position producing an output in response to a selected number of pulses counted for activating a pulse counter in a next more significant counting position to accummulate a count; a priority encoder connected to receive the outputs of each of the pulse counters for detecting the pulse counter in the least significant counting position which is not in said selected counting state and for producing a coding signal identifying said pulse counter; a first multiplexer connected to the priority encoder for receiving said coding signal and to the plurality of pulse counters for receiving the outputs of the pulse counters for producing an output only in response to the appearance of said coding signal and an output produced by the pulse counter identified by said coding signal; a source of control words having outputs and producing control words at the outputs; a second multiplexer connected to the priority encoder and outputs of the source of control words for producing an output only in response to an appearance of said coding signal, said output being representative of a control word digit corresponding to said coding signal; and a pulse selector having a plurality of inputs connected to receive the outputs of the first multiplexer and second multiplexer and the input signal for producing an output in response to the appearance at its inputs of the input signal and the outputs of the first multiplexer and second multiplexer.
Claim 3
Dependent Claim 20 words
A time multiplexed rate multiplier as in claim 1 wherein the source of control words includes a random access memory.
Claim 4
Dependent Claim 20 words
A time multiplexed rate multiplier as in claim 1 wherein the source of control words includes a read only memory.
Claim 5
Dependent Claim 71 words
A time multiplexed rate multiplier as in claim 1 wherein the means coupled to each of the pulse counters activates a pulse counter in a next more significant counting position to accumulate a count in response to a pulse counter in a less significant counting position producing an output in response to a fixed radix number of pulses counted whereby each counter will count pulses according to said fixed radix number.
Claim 6
Dependent Claim 16 words
A time multiplexed rate multiplier as in claim 4 wherein the fixed radix number is ten.
Claim 7
Dependent Claim 295 words
A time multiplexed rate multiplier comprising a plurality of pulse counters, a first one of the pulse counters having an input for receiving an input signal and each of said pulse counters having an enable input, each of said pulse counters being capable of assuming three output states as a first output, two of the output states in combination corresponding to a number of pulses counted and the third output state corresponding to the condition in which an enable signal is not present at the enable input, the second output corresponding to the pulse counter being in a selected counting state; means coupled to each of the pulse counters and responsive to a pulse counter in less significant counting position producing an output in response to a selected number of pulses counted for activating a pulse counter in a next more significant counting position to accumulate a count; priority enable means having inputs connected to the outputs of each of the plurality of pulse counters and outputs connected to the enable input of each of the plurality of pulse counters for detecting the pulse counTer corresponding to the least significant digit which is not in said counting state and for applying an enable signal to said pulse counter in response to said detection; a control word source having inputs connected to receive the output of the priority enable means for producing a plurality of control words each in response to the output from the priority enable means; and a pulse selector connected to receive the outputs of the pulse counters, a control word from the control word source and the input signal for producing an output in response to the appearance of the outputs of the pulse counters, the control word and the input signal.
Claim 8
Dependent Claim 295 words
A time multiplexed rate multiplier comprising a plurality of pulse counters, a first one of the pulse counters having an input for receiving an input signal and each of said pulse counters having an enable input, each of said pulse counters being capable of assuming three output states as a first output, two of the output states in combination corresponding to a number of pulses counted and the third output state corresponding to the condition in which an enable signal is not present at the enable input, the second output corresponding to the pulse counter being in a selected counting state; means coupled to each of the pulse counters and responsive to a pulse counter in less significant counting position producing an output in response to a selected number of pulses counted for activating a pulse counter in a next more significant counting position to accumulate a count; priority enable means having inputs connected to the outputs of each of the plurality of pulse counters and outputs connected to the enable input of each of the plurality of pulse counters for detecting the pulse counTer corresponding to the least significant digit which is not in said counting state and for applying an enable signal to said pulse counter in response to said detection; a control word source having inputs connected to receive the output of the priority enable means for producing a plurality of control words each in response to the output from the priority enable means; and a pulse selector connected to receive the outputs of the pulse counters, a control word from the control word source and the input signal for producing an output in response to the appearance of the outputs of the pulse counters, the control word and the input signal.
Claim 9
Dependent Claim 19 words
A time multiplexed rate multiplier as in claim 6 wherein the control word source includes a read only memory.
Claim 10
Dependent Claim 19 words
A time multiplexed rate multiplier as in claim 6 wherein the control word source includes a random access memory.
Claim 11
Dependent Claim 21 words
A time multiplexed rate multiplier as in claim 6 wherein the control word source comprises a plurality of three state latches.
Claim 12
Dependent Claim 71 words
A time multiplexed rate multiplier as in claim 6 wherein the means coupled to each of the pulse counters activates a pulse counter in a next more significant counting position to accumulate a count in response to a pulse counter in a less significant counting position producing an output in response to a fixed radix number of pulses counted whereby each counter will count pulses according to said fixed radix number.
Claim 13
Dependent Claim 16 words
A time multiplexed rate multiplier as in claim 10 wherein the fixed radix number is ten.
Claim 14
Dependent Claim 266 words
A time multiplexed rate multiplier comprising: a plurality of pulse counters, a first one of the pulse counters receiving an input signal and each of said pulse counters producing outputs corresponding to a number of pulses counted and corresponding to the pulse counter being in a selected counting state; means coupled to each of the pulse counters and in response to a pulse counter in a less significant counting position producing an output in response to a selected number of pulses counted for activating a pulse counter in a next more significant counting position to accumulate a count; a priority encoder having inputs connected to receive the outputs of each of the pulse counters for detecting the pulse counter in the least significant counting position which is not in said selected counting state and for producing a coding signal identifying said pulse counter; a first multiplexer connected to receive said coding signal and the outputs of the pulse counters for producing an output only in response to the appearance of said coding signal and an output produced by the pulse counter identified by said coding signal; a control word source having inputs and outputs and its inputs connected to the output of the priority encoder means for producing as an output control words in response to the coding signal; and a pulse selector having a plurality of inputs connected to receive the outputs of the first multiplexer, memory, and an input signal for producing an output in response to the appearance of an input signal and the outputs of the first multiplexer and control word source.
Claim 15
Dependent Claim 266 words
A time multiplexed rate multiplier comprising: a plurality of pulse counters, a first one of the pulse counters receiving an input signal and each of said pulse counters producing outputs corresponding to a number of pulses counted and corresponding to the pulse counter being in a selected counting state; means coupled to each of the pulse counters and in response to a pulse counter in a less significant counting position producing an output in response to a selected number of pulses counted for activating a pulse counter in a next more significant counting position to accumulate a count; a priority encoder having inputs connected to receive the outputs of each of the pulse counters for detecting the pulse counter in the least significant counting position which is not in said selected counting state and for producing a coding signal identifying said pulse counter; a first multiplexer connected to receive said coding signal and the outputs of the pulse counters for producing an output only in response to the appearance of said coding signal and an output produced by the pulse counter identified by said coding signal; a control word source having inputs and outputs and its inputs connected to the output of the priority encoder means for producing as an output control words in response to the coding signal; and a pulse selector having a plurality of inputs connected to receive the outputs of the first multiplexer, memory, and an input signal for producing an output in response to the appearance of an input signal and the outputs of the first multiplexer and control word source.
Claim 16
Dependent Claim 19 words
A time multiplexed rate multiplier as in claim 12 wherein the control word source includes a read only memory.
Claim 17
Dependent Claim 19 words
A time multiplexed rate multiplier as in claim 12 wherein the control word source includes a random access memory.
Claim 18
Dependent Claim 71 words
A time multiplexed rate multiplier as in claim 12 wherein the means coupled to each of the pulse counters activates a pulse counter in a next more significant counting position to accumulate a count in response to a pulse counter in a less significant counting position producing an output in response to a fixed radix number of pulses counted whereby each counter will count pulses according to said fixed radix number.
Claim 19
Dependent Claim 16 words
A time multiplexed rate multiplier as in claim 15 wherein the fixed radix number is two.
Claim 20
Dependent Claim 25 words
A time multiplexed rate multiplier as in claim 16 wherein the control word source includEs a shift register shifted in synchronism with the input signal.

References Cited (Backward Citations)

US3230353A Cited
US3510633A Cited
US3735104A Cited
US3764784A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-07-29 1978-01-28 1978-07-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-07-29 1982-01-28 1982-07-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-07-29 1986-01-28 1986-07-30 $7700.00 Window Closed / Lapsed

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