Patent US3825904A successfully refreshed from Google Patents.
US3825904A
Expired / Lapsed
US
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Virtual memory system
Assignee: International Business Machines Corp
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Filing: 1973-06-08
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Granted: 1974-07-23
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Expires: 1993-06-08
Abstract
Abstract This specification describes a virtual memory system in which a set of conversion tables is used to translate an arbitrarily assigned programming designation called a virtual address into an actual main memory location called a real address. To avoid the necessity of translating the same addresses over and over again, a table called the Directory Look Aside Table (DLAT) retains current virtual to real address translations for use where particular virtual addresses are requested more than once. The DLAT not only stores translations of requested address but also stores translations of addresses that immediately precede or succeed the requested address in the virtual address sequence in anticipation of their being requested. Furthermore, to simplify the translation process data obtained from the translation table during the last translation is stored in anticipation of its use in the next request for translation.
Inventors
- 👤 J Burk
- 👤 D Duffy
- 👤 S Hogan
- 👤 R Larson
- 👤 Gilvray B Mc
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 23:37
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/10; G06F12/1027; G06F12/1045; G06F12/1054
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
236 words
In a data processing system which contains a central processing unit, a main storage having n addressable locations each addressable by a real storage address, a buffer storage having fewer than n addressable locations each addressable by a real storage address, addressing means providing virtual addresses each having a virtual portion which is made up of bits that do not constitute a portion of a real storage address and a real displacement which is made up of address bits that constitute a portion of a real storage address, and translation table means for translating the virtual portions of the virtual addresses to real address portions other than said displacement, an improved translation storage means comprising: an accessing means for reading a plurality of real addresses from said translation table means each time a translation of one of the virtual addresses is requested; storage table means for storing real addresses of data contained in main storage, each plurality having been obtained from said accessing means each time a translation of a virtual address is requested, said storage table means including addressing means for simultaneous accessing of all the plurality of read addresses received from one translation request; and decode means for distinguishing between all said plurality of real addresses received from one translation of a requested virtual address to obtain the real address of the requested virtual address from the simultaneously accessed plurality of the real address.
Claim 2
Dependent Claim
236 words
In a data processing system which contains a central processing unit, a main storage having n addressable locations each addressable by a real storage address, a buffer storage having fewer than n addressable locations each addressable by a real storage address, addressing means providing virtual addresses each having a virtual portion which is made up of bits that do not constitute a portion of a real storage address and a real displacement which is made up of address bits that constitute a portion of a real storage address, and translation table means for translating the virtual portions of the virtual addresses to real address portions other than said displacement, an improved translation storage means comprising: an accessing means for reading a plurality of real addresses from said translation table means each time a translation of one of the virtual addresses is requested; storage table means for storing real addresses of data contained in main storage, each plurality having been obtained from said accessing means each time a translation of a virtual address is requested, said storage table means including addressing means for simultaneous accessing of all the plurality of read addresses received from one translation request; and decode means for distinguishing between all said plurality of real addresses received from one translation of a requested virtual address to obtain the real address of the requested virtual address from the simultaneously accessed plurality of the real address.
Claim 3
Dependent Claim
35 words
The data processing system of claim 1 including means for storing the contents of said translation table means after one translation has been made so that it can be used in making a section translation.
Claim 4
Dependent Claim
34 words
The data processing system of claim 1 wherein said accessing means includes means for obtaining the plurality of real addresses by translation therein from virtual addresses having consecutive binary numbers for their virtual portions.
Claim 5
Dependent Claim
190 words
In a data processing system which contains a central processing unit, a main storage having n addressable locations each addressable by a real storage address, a buffer storage having fewer than n addressable locations each addressable by a real storage address, addressing means providing virtual addresses each having a virtual portion which is made up of bits that do not constitute a portion of a real storage address and a real displacement which is made up of address bits that constitute a portion of a real storage address, and translation table means made up of the series of tables for translating the virtual portions of the virtual addresses to real address portions by using said tables in sequence to modify the virtual portions of the virtual addresses, an improved translation means comprising: additional storage means for retaining data obtained from one of the tables in the sequence that is used to access another table in the sequence, and means for using that retained data in the next translation when said output of said one table is needed to make translation thereby reducing the time needed to perform the next translation.
Claim 6
Dependent Claim
190 words
In a data processing system which contains a central processing unit, a main storage having n addressable locations each addressable by a real storage address, a buffer storage having fewer than n addressable locations each addressable by a real storage address, addressing means providing virtual addresses each having a virtual portion which is made up of bits that do not constitute a portion of a real storage address and a real displacement which is made up of address bits that constitute a portion of a real storage address, and translation table means made up of the series of tables for translating the virtual portions of the virtual addresses to real address portions by using said tables in sequence to modify the virtual portions of the virtual addresses, an improved translation means comprising: additional storage means for retaining data obtained from one of the tables in the sequence that is used to access another table in the sequence, and means for using that retained data in the next translation when said output of said one table is needed to make translation thereby reducing the time needed to perform the next translation.
Claim 7
Dependent Claim
31 words
The data processing system of claim 4 wherein said tables include page tables and a segment table containing references to said page tables and said one table is a segment table.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-07-22 | 1978-01-21 | 1978-07-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-07-22 | 1982-01-21 | 1982-07-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-07-22 | 1986-01-21 | 1986-07-23 | $7700.00 | Window Closed / Lapsed |