Dual mode angle encoder

Claim 1

An angle encoder operative in response to a control to provide alternative output indications of relative angular position or angular deviation, said encoder system comprising: a code element having a sensible code thereon defining a plurality of predetermined multiple bit Gray coded values representative of angular position; said code having a predetermined angular reference position; means for sensing the code on said code element and for providing a plurality of digital signals representing a Gray coded version of angular position; said code element and said sensing means being adapted for relative rotation about an axis of said element; logic circuitry operative in response to said plurality of digital signals and including: Gray-to-binary code converter means for converting said Gray coded digital signals into binary coded output signals; said converter means being responsive to said plurality of digital signals except the most significant bit thereof; a unidirectional binary counter receiving in the bit locations thereof below the most significant bit location said binary coded output signals from saiD converter means; decoder means coupled to the output of said counter means and operative to provide an output signal in response to the counter output reaching a selectable first or second predetermined count; clock means for providing clock pulses to increment said counter from the binary number received from said converter to the first or second predetermined count at which said decoder is responsive to provide the decoder output signal; said decoder output signal being applied to stop the provision of the clock pulses by said clock means; a control signal source for providing a first control signal of first or second binary value to represent selection of relative angular position or angular deviation output indications; control logic operative in response to said first control signal and to the digital signal representing the most significant bit of said Gray code to provide second and third control signals; said second control signal being an inversion of said digital signal representing the most significant bit when said first control signal is of a first binary value and otherwise having a predetermined binary value; said second control signal being applied to the most significant bit inputs of said converter means and of said counter; said third control signal being the inverse of said digital signal representing the most significant bit when said first control signal is of a second binary value and otherwise being of a predetermined binary value; and OR gating means operative in response to said third control signal and the least significant bit signal from said counter to provide a fourth control signal to said decoder means to select the first or second counts thereof; said fourth control signal being the logical OR of the third control signal with the least significant bit from said counter; the clock pulses provided by said clock means being, in response to said first control signal of first binary value, of a number representative of the relative angular position of said code element with respect to said predetermined angular reference position, and being, in response to said first control signal of second binary value, of a number representative of the angular deviation of said code element with respect to the predetemined angular reference position, the digital signal representing the most significant bit indicating the sense of said angular deviation.