Patent US3824561A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3824561A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus for allocating storage addresses to data elements

Assignee: International Business Machines Corp
•
Filing: 1972-12-29
•
Granted: 1974-07-16
•
Expires: 1992-12-29
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A group of variable length data elements are allocated storage addresses by means of apparatus and an associated method, the allocation taking place before the data elements are stored. Characteristic data sets are provided in a main storage which define the characteristics of each data element in the group. The data sets are scanned in two directions. On the first pass, information as to the lengths and boundary requirements of each element are accumulated. On the second pass, addresses are allocated to each element to eliminate gaps in the group while maintaining proper boundary alignment.

Inventors

  • 👤 P Wolf

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 17:13
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/04

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 176 words
Apparatus for automatically allocating storage addresses to a group of data elements of varying lengths, comprising: storage means for storing characteristic data sets denoting characteristics of said data elements, each data set containing data fields comprising a length value denoting the length of the associated data element and a characteristic value denoting the boundary type of the associated data element; a working register connected to said storage means for buffering a characteristic data set; control means connected to said storage means and said working register for loading said characteristic data sets serially in said working register; an accumulator register connected to said working register for accumulating each length value from each data set buffered in said working register; an address computing unit linked with positions of said working register and said accumulator register; and an address alignment circuit for comparing the contents of said accumulator register with each said characteristic value buffered in said working register and incrementing said contents according to each said characteristic value so as to correspond to the boundary type denoted thereby.
Claim 2
Dependent Claim 176 words
Apparatus for automatically allocating storage addresses to a group of data elements of varying lengths, comprising: storage means for storing characteristic data sets denoting characteristics of said data elements, each data set containing data fields comprising a length value denoting the length of the associated data element and a characteristic value denoting the boundary type of the associated data element; a working register connected to said storage means for buffering a characteristic data set; control means connected to said storage means and said working register for loading said characteristic data sets serially in said working register; an accumulator register connected to said working register for accumulating each length value from each data set buffered in said working register; an address computing unit linked with positions of said working register and said accumulator register; and an address alignment circuit for comparing the contents of said accumulator register with each said characteristic value buffered in said working register and incrementing said contents according to each said characteristic value so as to correspond to the boundary type denoted thereby.
Claim 3
Dependent Claim 85 words
Apparatus in accordance with claim 1, wherein said address alignment circuit comprises a masking circuit for the lowest positions of said accumulator register, said masking circuit responding to predetermined bits in each characteristic value; an incrementing circuit connected to said accumulator register; and said masking circuit comprising a control signal output for actuating said incrementing circuit and which, in accordance with a logic function, carries a signal as long as there is a predetermined bit in one of the masked positions of said accumulator register.
Claim 4
Dependent Claim 70 words
Apparatus in accordance with claim 2 comprising: a further register for buffering the characteristic value Z'' of the greatest boundary type of said data elements, means for comparing said characteristic value Z'' with each characteristic value Z in said working register and means for setting said value Z'' to a new value corresponding to that of Z whenever the value of Z being compared is greater than that of Z''.
Claim 5
Dependent Claim 42 words
Apparatus in accordance with claim 3 comprising: means for selectively coupling said further register with said masking circuit and said incrementing circuit to set the contents of said accumulator register to a storage boundary associated with said group as a start address.
Claim 6
Dependent Claim 52 words
Apparatus in accordance with claim 1 wherein said control means comprises: a push-down storage for storing the addresses of characteristic data sets characterizing substructures of said group of data elements, and addressing means responsive to each address in said push-down storage for loading said data set addressed thereby into said working register.

References Cited (Backward Citations)

US3299410A Cited
US3399394A Cited
US3387280A Cited
US3694813A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-07-15 1978-01-14 1978-07-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-07-15 1982-01-14 1982-07-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-07-15 1986-01-14 1986-07-16 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag