Power supply circuit for electronic digital system

Claim 2

An electronic system including a high impedance load, a lowvoltage cell for providing a low DC output voltage to said system and a source of alternating timing pulses, a converter circuit for converting the DC voltage from said low voltage cell to a higher DC output voltage suitable for driving said high impedance load comprising voltage multiplier means having an input and an output, the output being connected to provide an output signal to said high impedance load, said voltage multiplier means operating to convert pulse voltage signals at the input thereof to a higher voltage at the output and including a plurality of capacitordiode stages, each stage including at least one capacitor and diode, and complementary-symmetry inverter circuit means connected to said low-voltage cell, said source of timing pulses and the input to said multiplier means for providing pulse voltage signals to the input of said multiplier means, said inverter circuit means operating to minimize power dissipation while providing impedance matching between said multiplier means and source of alternating timing pulses and including P-channel and N-channel MOS transistors having gate electrodes electrically connected together, drain electrodes electrically connected together and source electrodes, one of sid source electrodes being connected to said low-voltage cell and another source electrode being connected to an electrical ground, The interconnected gate electrodes being connected to the source of alternating timing pulses and the interconnected drain electrodes being connected to the input to said voltage multiplier means.

Claim 3

The electronic system of claim 1 wherein the diodes in said multiplier means are of the Schottkey barrier type.

Claim 4

The electronic system of claim 1 wherein the multiplier means is a voltage multiplying circuit of the Cockcroft type.

Claim 5

The electronic system of claim 1 wherein the multiplier means is a voltage multiplying circuit of the Schenkel type.

Claim 6

The electronic system of claim 1 wherein said complementary-symmetry inverter circuit means includes first and second complementary-symmetry inverter circuits, the first complementary-symmetry inverter circuit including first and second MOS transistors of opposite gate channel types which have gate electrodes electrically connected together, drain electrodes electrically connected together and source electrodes, the second complementary-symmetry inverter circuit comprising third and fourth MOS transistors of opposite gate channel types which have gate electrodes electrically connected together, drain electrodes electrically connected together, and source electrodes, the source electrodes of the first MOS transistor of the first inverter circuit and of the third MOS transistor of the second inverter circuit being connected to the low-voltage cell, the source electrodes of the second MOS transistor of the first inverter circuit and the fourth MOS transistor of the second inverter circuit being grounded, said source of alternating timing pulses including means for providing alternating timing pulses of opposite phase to first and second output terminals, said first output terminal being connected to the gate electrodes of the first inverter circuit and the second output terminal being connected to the gate electrodes of the second inverter circuit, the input of said voltage multiplying means including a first input terminal connected to the drain electrodes of said first inverter circuit and a second input terminal connected to the drain electrodes of said second inverter circuit.

Claim 7

The electronic system of claim 5 wherein said high impedance load includes a liquid crystal display unit.

Claim 8

A digital electronic watch system comprising timing pulse generator means providing a timing pulse signal, arithmetic circuit means for receiving said timing pulse signal and deriving therefrom a seconds output signal, a minutes output signal and an hours output signal, liquid crystal display means for converting said seconds output signal to a visual indication, said minutes output signal to a visual indication and said hours output signal to a visual indication, a low voltage DC cell connected to provide a low DC voltage to said timing pulse generator, and a converter circuit means connected to receive said low DC voltage and said timing pulse signal and operative to convert said low DC voltage to a high DC voltage, said converter circuit means including voltage multiplier means having an input and an output connected to provide an output signal to at least said liquid crystal display means, said voltage multiplier means operating to convert pulse voltage signals at the input thereof to a higher voltage signal at the output and including a network of diodes and capacitors, and complementary-symmetry MOS transistor inverter means connected to receive said timing pulse signal and the low DC voltage from said low voltage DC cell and to provide low voltage pulse signals to the input of said voltage multiplier means.

Claim 9

A digital electronic watch system comprising timing pulse generator means providing a timing pulse signal, arithmetic circuit means for receiving said timing pulse signal and deriving therefrom a seconds output signal, a minutes output signal and an hours output signal, liquid crystal display means for converting said seconds output signal to a visual indication, said minutes output signal to a visual indication and said hours output signal to a visual indication, a low voltage DC cell connected to provide a low DC voltage to said timing pulse generator, and a converter circuit means connected to receive said low DC voltage and said timing pulse signal and operative to convert said low DC voltage to a high DC voltage, said converter circuit means including voltage multiplier means having an input and an output connected to provide an output signal to at least said liquid crystal display means, said voltage multiplier means operating to convert pulse voltage signals at the input thereof to a higher voltage signal at the output and including a network of diodes and capacitors, and complementary-symmetry MOS transistor inverter means connected to receive said timing pulse signal and the low DC voltage from said low voltage DC cell and to provide low voltage pulse signals to the input of said voltage multiplier means.

Claim 10

The electronic watch system of claim 7 wherein said timing pulse generator means includes an oscillator and frequency divider means.

Claim 11

The electronic watch system of claim 7 wherein said arithmetic circuit means includes counter means for deriving time information in seconds, minutes and hour digit places and providing said seconds, minutes and hours output signals indicative thereof, said liquid crystal display means including driver circuit means connected to receive said seconds, minutes and hours output signals, said driver circuit means being connected to the output of said voltage multiplier means.

Claim 12

The electronic watch system of claim 9 wherein said liquid crystal display means includes a plurality of liquid crystal indicators connected to said driver circuit means, said liquid crystal indicators and said arithmetic circuit means being connected to the output of said voltage multiplier means.

Claim 13

The electronic watch system of claim 7 wherein said complementary-symmetry MOS transistor inverter means includes first and second complementary-symmetry inverter circuits, the first complementary-symmetry inverter circuit including first and second MOS transistors of opposite gate channel types which have gate electrodes electrically connected together, drain electrodes electrically connected together and source electrodes, the second complementary-symmetry inverter circuit comprising third and fourth MOS transistors of opposite gate channel types which have gate electrodes electrically connected together, drain electrodes electrically connected together, and source electrodes, the source electrodes of the first MOS transistor of the first inverter circuit and of the third MOS transistor of the second inverter circuit being connected to the low voltage DC cell, the source electrodes of the second MOS transistor of the first inverter circuit and of the fourth MOS transistor of the second inverter circuit being connected to an electrical ground, said timing pulse generator means including means for providing alternating timing pulses of opposite phase to first and second output terminals, said first output terminal being connected to the gate electrodes of the first inverter circuit and the second output terminal being connected to the gate electrodes of the second inverter circuit, the input to said voltage multiplier means including a first input terminal connected to the drain electrodes of said first inverter circuit and a second input terminal connected to the drain electrodes of said second inverter circuit.

Claim 14

The electronic watch system of claim 11 wherein said voltage multiplier means includes a voltage multiplier circuit of the Schenkel type incorporating diodes of the Schottkey barrier type.

Claim 15

The electronic watch system of claim 11 wherein said timing pulse generator means includes an oscillator and frequency divider means connected to receive the output from said oscillator, said frequency divider means operating to provide the alternating timing pulses of opposite phase to said complementary-symmetry MOS transistor inverter means, an said arithmetic circuit means includes counter means for deriving time information in seconds, minutes and hour digit places and providing said seconds, minutes and hours output signals indicative thereof, said driver circuit means being connected to the output of said voltage multiplier means.

Claim 16

The electronic watch system of claim 13 wherein said liquid crystal display means includes an EXCLUSIVE OR driver circuit and a liquid crystal indicator for said seconds output signals, for said minutes output signals, and for said hours output signals, said liquid crystal indicators and said arithmetic circuit means being connected to the output of said voltage multiplier means.