Patent US3818356A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3818356A Expired / Lapsed US ⏱️ 0.0 years remaining

Pulse-shape discriminating circuit, for discriminating between pulses of differing amplitude and time duration

Assignee: Japan Atomic Energy Agency
•
Filing: 1972-03-23
•
Granted: 1974-06-18
•
Expires: 1992-03-23
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An output pulse derived from a radiation detector is supplied simultaneously to two characteristic circuits, one of which is substantially a delay characteristic circuit and the other is substantially an integration or a stretch characteristic circuit. The outputs of these circuits are supplied to an amplitude discriminator in which the width of the output pulse is determined by detecting two intersecting phases of the output waveform of the delay characteristic circuit with the output waveform of the expansion circuit. Further, if either of the outputs of these circuits is inverted in polarity by a polarity inverter and the inverted output and the other output are added in a suitable means connected between the output terminals of the other circuit and the inverter, an improved pulse-shape discrimination can be performed by the discriminator by amplitude-discriminating said added output with a reference voltage which is selected as equal to a D.C. output voltage of said means at the normal state thereof.

Inventors

  • 👤 S Kinbara

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 19:11
CPC Classifications
G; G01; G01R; G01R29/00; G01R29/02; G01R29/027; G01R29/0273; G01T; G01T1/00; G01T1/36; G01T1/38

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 277 words
A pulse shape discriminating circuit for discriminating between pulses of differing amplitude and time duration, the differences in time duration occurring primarily along the trailing edges of the pulses, comprising: a first characteristic circuit having a first pulse shaping characteristic, a second characteristic circuit having a second pulse shaping characteristic, the input terminal of said first pulse shaping characteristic being coupled to the input terminal of said first characteristic circuit, a polarity inverter circuit having its input terminal connected to either one of the output terminals of said first and second characteristic circuits, means for adding the output signals of said inverter and the other characteristic circuit, and an amplitude discriminator circuit having its input terminals coupled respectively to an output terminal of said means and a fixed reference voltage supply, the reference voltage being equal to a voltage at said output terminal of said means when it is in a normal state whereby, when an input pulse is supplied to both of said first and second characteristic circuits through their respective input terminals, said characteristic circuits produce pulses shaped according to their characteristics respectively, the polarity of either one of said produced pulses being inverted, said inverted pulse and the output signal of the other characteristic circuit being added in said means, the added signal being discriminated with said reference voltage level in said discriminator, the time duration between points which represent said amplitude of said added signal becoming equal to said reference level being measured and said time duration being used to produce a pulse whose height corresponds to said duration or to a plurality of clock pulses whose number is proportional to said duration.
Claim 2
Dependent Claim 277 words
A pulse shape discriminating circuit for discriminating between pulses of differing amplitude and time duration, the differences in time duration occurring primarily along the trailing edges of the pulses, comprising: a first characteristic circuit having a first pulse shaping characteristic, a second characteristic circuit having a second pulse shaping characteristic, the input terminal of said first pulse shaping characteristic being coupled to the input terminal of said first characteristic circuit, a polarity inverter circuit having its input terminal connected to either one of the output terminals of said first and second characteristic circuits, means for adding the output signals of said inverter and the other characteristic circuit, and an amplitude discriminator circuit having its input terminals coupled respectively to an output terminal of said means and a fixed reference voltage supply, the reference voltage being equal to a voltage at said output terminal of said means when it is in a normal state whereby, when an input pulse is supplied to both of said first and second characteristic circuits through their respective input terminals, said characteristic circuits produce pulses shaped according to their characteristics respectively, the polarity of either one of said produced pulses being inverted, said inverted pulse and the output signal of the other characteristic circuit being added in said means, the added signal being discriminated with said reference voltage level in said discriminator, the time duration between points which represent said amplitude of said added signal becoming equal to said reference level being measured and said time duration being used to produce a pulse whose height corresponds to said duration or to a plurality of clock pulses whose number is proportional to said duration.
Claim 3
Dependent Claim 42 words
A pulse-shape discrimination circuit as set forth in claim 1, wherein said first characteristic circuit is a circuit having a stretch characteristic as its main characteristic and said second characteristic circuit is a circuit having a delay characteristic as its main characteristic.
Claim 4
Dependent Claim 295 words
A pulse shape discriminating circuit for discriminating between pulses of differing amplitude and time duration, the differences in time duration occurring primarily along the trailing edges of the pulses, comprising; a first pulse shaping characteristic circuit having an integrating characteristic as its main characteristic, a second pulse shaping characteristic circuit having a delay characteristic as its main characteristic, the input terminal of said firsT pulse shaping characteristic being coupled to the input terminal of said first characteristic circuit, a polarity inverter circuit having its input terminal connected to either one of the output terminals of said first and second characteristic circuits, means for adding the output signals of said inverter and the other characteristic circuit, and an amplitude discriminator circuit having its input terminals coupled respectively to an output terminal of said means and a fixed reference voltage supply, the reference voltage being equal to a voltage at said output terminal of said means when it is in a normal state whereby, when an input pulse is supplied to both of said first and second characteristic circuits through their respective input terminals, said characteristic circuits produce pulses shaped according to their chaacteristics respectively, the polarity of either one of said produced pulses being inverted, said inverted pulse and the output signal of the other characteristic circuit being added in said means, the added signal being discriminated with said reference voltage level in said discriminator, the time duration between points which represent said amplitude of said added signal becoming equal to said reference level being measured and said time duration being used to produce a pulse whose height corresponds to said duration or to a pulse whose height corresponds to said duration or to a plurality of clock pulses whose number is proportional to said duration.
Claim 5
Dependent Claim 295 words
A pulse shape discriminating circuit for discriminating between pulses of differing amplitude and time duration, the differences in time duration occurring primarily along the trailing edges of the pulses, comprising; a first pulse shaping characteristic circuit having an integrating characteristic as its main characteristic, a second pulse shaping characteristic circuit having a delay characteristic as its main characteristic, the input terminal of said firsT pulse shaping characteristic being coupled to the input terminal of said first characteristic circuit, a polarity inverter circuit having its input terminal connected to either one of the output terminals of said first and second characteristic circuits, means for adding the output signals of said inverter and the other characteristic circuit, and an amplitude discriminator circuit having its input terminals coupled respectively to an output terminal of said means and a fixed reference voltage supply, the reference voltage being equal to a voltage at said output terminal of said means when it is in a normal state whereby, when an input pulse is supplied to both of said first and second characteristic circuits through their respective input terminals, said characteristic circuits produce pulses shaped according to their chaacteristics respectively, the polarity of either one of said produced pulses being inverted, said inverted pulse and the output signal of the other characteristic circuit being added in said means, the added signal being discriminated with said reference voltage level in said discriminator, the time duration between points which represent said amplitude of said added signal becoming equal to said reference level being measured and said time duration being used to produce a pulse whose height corresponds to said duration or to a pulse whose height corresponds to said duration or to a plurality of clock pulses whose number is proportional to said duration.

References Cited (Backward Citations)

US3011128A Cited
US3076145A Cited
US3130371A Cited
US3319170A Cited
US3513400A Cited
US3473114A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-06-17 1977-12-17 1978-06-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-06-17 1981-12-17 1982-06-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-06-17 1985-12-17 1986-06-18 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag