Bit serial divider with full scale capabilities

Claim 2

Serial digital word dividing apparatus operating to complete a division operation in the time necessary to clock a a frame of words wherein the number of words in a frame equals the number of bits in the divisor word comprising, in combination: first and second input means for supplying LSB (least significant bit) first serial digital dividend and divisor words respectively; apparatus output means for supplying LSB first serial digital quotient words; first logic means, connected to said first and second input means, for comparing the sign bits of said dividend and divisor words and providing an output signal when the sign bits are not identical; second logic means, connected to said first and second input means and to said first logic means, for adding said dividend and divisor words during the first word of a frame only if said first logic means supplies an output signal, for doubling a partial remainder obtained during each word of the frame, for comparing the partial remainder to the divisor, for subtracting the divisor word from the partial remainder if the partial remainder is larger and for supplying an output signal for each subtraction; and connection means connecting said first and second logic means to said apparatus output means for supplying a first logic output indicator to said apparatus output means when an output signal is received from either of said logic means and for supplying a second logic output indicator when no output signals are received from either of said logic means during a word of the frame.

Claim 3

Dividing apparatus as claimed in claim 1 comprising, in addition: third logic means, connected to said first and second input means, said first and second logic means and said connection means, for supplying output signals to produce one of the logic output indicators when the quotient would exceed apparatus capacity and when an output is received from said first logic means during the same frame and to produce the other logic output indicator when the quotient would exceed apparatus capacity and no output signal is received from the first logic means during that frame.

Claim 4

Dividing apparatus as claimed in claim 2 wherein said third logic means includes: means for supplying signals for providing logic zeros to said apparatus output means commencing with the second word when the capacity of the apparatus is exceeded in the negative direction; and further means for supplying an overriding signal for providing a logic one to said apparatus output means in the least significant bit position when the capacity of the apparatus is exceeded in the negative direction.

Claim 5

Dividing apparatus comprising, in combination: multiplying means, including divisor serial digital word input means, control means and output means, for providing an output word indicative of a word supplied to the digital input thereOf when a control signal is supplied to the control means thereof; first summing means, including first and second input means and output means; means connecting said output means of said multiplying means to said first input means of said first summing means; first shift register means including input means and output means; gating means, connected between said output means of said first summing means and said input means of said first shift register means, for passing all bits other than those occurring during the sign bit position time of the words in a frame; second shift register means including input and output means; second summing means, including first and second input means and output means, for providing a difference signal at said output means thereof of signals supplied to said input means thereof; dividend means for supplying a dividend serial digital word signal; switch means, connected to said input means of said second shift register means and to said first input means of second summing means, for normally supplying signals from said output means of said first shift register means and for alternatively periodically supplying dividend signals from said dividend means. means connecting said output means of said second shift register means to said second input means of said first summing means; first logic means, including first and second input means and output means, for providing a logic 1 output signal when the sign bits of words applied to said inputs thereof are identical; divisor serial digital word signal supply means connected to said input means of said multiplying means and to said second input means of each of said second summing means and said logic means; means connecting said output means of said second summing means to said first input means of said logic means; and means connecting said output means of said logic means to said control means of said multiplying means.

Claim 6

Dividing apparatus comprising, in combination: multiplying means, including divisor serial digital word input means, control means and output means, for providing an output word indicative of a word supplied to the digital input thereOf when a control signal is supplied to the control means thereof; first summing means, including first and second input means and output means; means connecting said output means of said multiplying means to said first input means of said first summing means; first shift register means including input means and output means; gating means, connected between said output means of said first summing means and said input means of said first shift register means, for passing all bits other than those occurring during the sign bit position time of the words in a frame; second shift register means including input and output means; second summing means, including first and second input means and output means, for providing a difference signal at said output means thereof of signals supplied to said input means thereof; dividend means for supplying a dividend serial digital word signal; switch means, connected to said input means of said second shift register means and to said first input means of second summing means, for normally supplying signals from said output means of said first shift register means and for alternatively periodically supplying dividend signals from said dividend means. means connecting said output means of said second shift register means to said second input means of said first summing means; first logic means, including first and second input means and output means, for providing a logic 1 output signal when the sign bits of words applied to said inputs thereof are identical; divisor serial digital word signal supply means connected to said input means of said multiplying means and to said second input means of each of said second summing means and said logic means; means connecting said output means of said second summing means to said first input means of said logic means; and means connecting said output means of said logic means to said control means of said multiplying means.

Claim 7

Apparatus as claimed in claim 4 comprising, in addition: second logic means, connected to said output means of said second summing means, to said divisor means, to said dividend means and to said first logic means, for providing an output signal to said first logic means to force said first logic means to a logic 1 output when said second logic means receives input words from each of said second summing means and said divisor and said dividend means each word having identical sign bits thereby indicating that the quotient exceeds the apparatus capacity in the positive polarity direction.

Claim 8

Apparatus as claimed in claim 4 comprising, in addition: second logic means, connected to said output means of said first summing means and to said divisor and to said dividend means, for providing output signals for inserting logic 0''s in a quotient word appearing at an apparatus output means when the sign bits of the divisor and dividend words are different and when simultaneously the summation word representing the divisor and dividend words has the same sign as the dividend word, thereby indicating that the quotient exceeds the apparatus capacity in the negative polarity direction.

Claim 9

Apparatus as claimed in claim 4 comprising, in addition: apparatus output means, connected to said first logic means, for supplying output quotient words; second logic means, connected to said output means of said second summing means, to said divisor means, to said dividend means and to said first logic means, for providing an output signal to said first logic means to force said first logic means to a logic 1 output when said second logic means receives input words from each of said second summing means and said divisor and said dividend means each word having identical sign bits thereby indicating that the quotient exceeds the apparatus capacity in the positive polarity direction; third logic means, connected to said output means of said first summing means and to said divisor and to said divideNd means, for providing output signals for inserting logic 0''s in the quotient word appearing at said apparatus output means when the sign bits of the divisor and dividend words are different and when simultaneously the summation word representing the divisor and dividend words has the same sign as the dividend word, thereby indicating that the quotient exceeds the apparatus capacity in the negative polarity direction; and fourth logic, connected to said third logic means, for inserting a logic 1 in the least significant bit position of the quotient word appearing at said apparatus output means when the quotient exceeds the apparatus capacity in the negative polarity direction.