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US3810135A Expired / Lapsed US ⏱️ 0.0 years remaining

Control circuit of recording and reproducing signals to and from magnetic transducers for magnetic memory apparatus

Assignee: Hitachi Ltd
•
Filing: 1972-10-13
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Granted: 1974-05-07
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Expires: 1992-10-13
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Abstract

Abstract A control circuit for recording and reproducing signals to and from magnetic heads for magnetic memory apparatus has a plurality of full wave rectifier circuits, each of which is connected to a corresponding magnetic head and an NPN transistor is connected between the output terminals of each full wave rectifier circuit. The transistor is saturated during the recording operation of the corresponding magnetic head and switched into an active region during the reproducing operation of the corresponding magnetic head.

Inventors

  • 👤 K Kawakami
  • 👤 E Kaneko

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 14:04
CPC Classifications
G; G11; G11B; G11B15/00; G11B15/02; G11B15/12

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 243 words
A control circuit for recording and reproducing signals to and from magnetic transducers for magnetic memory apparatus comprising: a plurality of switching circuits, each of which has a full wave rectifier circuit and a transistor, the collector and emitter of said transistor being connected between the output terminals of said full wave rectifier circuit, one input terminal of said full wave rectifier circuit being connected to one terminal of each corresponding magnetic transducer, the other input terminal of said full wave rectifier circuit being connected to ground, each collector of said transistors being connected together to a reproducing signal amplifier, and each of the other terminals of said magnetic transducers being connected together to a recording signal source; a selecting switch for selecting one of said switching circuits for operation thereof; first biasing means for biasing the transistor of a selected switching circuit to saturation during the recording operation of the selected switching circuit; second biasing means for biasing the transistor of the selected exchange circuit in an active region during the reproducing operation of the selected switching circuit; and third biasing means for applying a forward bias to a rectifier means provided in one branch of said full wave rectifier circuit of the selected switching circuit and for applying a reverse bias to a rectifier means provided in the other three branches of said full wave rectifier circuit of the selected switching circuit during the reproducing operation of the selected switching circuit.
Claim 2
Dependent Claim 243 words
A control circuit for recording and reproducing signals to and from magnetic transducers for magnetic memory apparatus comprising: a plurality of switching circuits, each of which has a full wave rectifier circuit and a transistor, the collector and emitter of said transistor being connected between the output terminals of said full wave rectifier circuit, one input terminal of said full wave rectifier circuit being connected to one terminal of each corresponding magnetic transducer, the other input terminal of said full wave rectifier circuit being connected to ground, each collector of said transistors being connected together to a reproducing signal amplifier, and each of the other terminals of said magnetic transducers being connected together to a recording signal source; a selecting switch for selecting one of said switching circuits for operation thereof; first biasing means for biasing the transistor of a selected switching circuit to saturation during the recording operation of the selected switching circuit; second biasing means for biasing the transistor of the selected exchange circuit in an active region during the reproducing operation of the selected switching circuit; and third biasing means for applying a forward bias to a rectifier means provided in one branch of said full wave rectifier circuit of the selected switching circuit and for applying a reverse bias to a rectifier means provided in the other three branches of said full wave rectifier circuit of the selected switching circuit during the reproducing operation of the selected switching circuit.
Claim 3
Dependent Claim 60 words
A control circuit for recording and reproducing signals to and from magnetic transducers for magnetic memory apparatus as claimed in claim 1, further comprising diode means connected between each collector of said transiStors and the reproducing signal amplifier for isolating the selected switching circuit from the non-selected switching circuits during the recording and reproducing operation of the selected switching circuit.
Claim 4
Dependent Claim 41 words
A control circuit for recording and reproducing signals to and from magnetic transducers for magnetic memory apparatus as claimed in claim 2, wherein said diode means is connected through a current limiting resistor to a source of forward bias potential therefor.
Claim 5
Dependent Claim 51 words
A control circuit for recording and reproducing signals to and from magnetic transducers for magnetic memory apparatus as claimed in claim 1, wherein said third biasing means comprises a source of bias potential having one electrode thereof switchably connected through a resistor capacitor network to a common connection of said transducers.
Claim 6
Dependent Claim 348 words
A control circuit for recording and reproducing signals to and from magnetic transducers for magnetic memory apparatus comprising: a plurality of switching circuits, each of which has a full wave rectifier circuit and a transistor, the collector and emitter of said transistor being connected between the output terminals of said full wave rectifier circuit, one input terminal of said full wave rectifier circuit being connected to one terminal of each corresponding magnetic transducer, the other input terminal of said full wave rectifier circuit being connected to ground, each collector of said transistors being connected together to a reproducing signal amplifier, and each of the other terminals of said magnetic transducers being connected together to a recording signal source; a selecting switch for selecting one of said switching circuits for operation thereof; first biasing means for applying a bias to the base of the transistor in the selected switching circuit through said selecting switch during the recording operation of the selected switching circuit; second biasing means for applying a bias to the base of the transistor in the selected switching circuit through said selecting switch during the reproducing operation of the selected switching circuit; and third biasing means for applying a forward bias to the rectifier means provided in one branch of said full wave rectifier circuit of the selected switching circuit and for applying a reverse bias to the rectifier means provided in the other three branches of said full wave rectifier circuit of the selected switching circuit during the reproducing operation thereof, thereby biasing said transistor of the selected switching circuit in the saturation region and transferring recording signals from the recording signal source to the magnetic transducer corresponding to the selected switching circuit during the recording operation thereof, and biasing said transistor of the selected switching circuit in an active region and transferring reproducing signals from the magnetic transducer corresponding to the selected switching circuit to the reproducing signal amplifier through said transistor and the rectifier means of the one branch of said full wave rectifier circuit of the selected switching circuit during reproducing operation thereof.
Claim 7
Dependent Claim 348 words
A control circuit for recording and reproducing signals to and from magnetic transducers for magnetic memory apparatus comprising: a plurality of switching circuits, each of which has a full wave rectifier circuit and a transistor, the collector and emitter of said transistor being connected between the output terminals of said full wave rectifier circuit, one input terminal of said full wave rectifier circuit being connected to one terminal of each corresponding magnetic transducer, the other input terminal of said full wave rectifier circuit being connected to ground, each collector of said transistors being connected together to a reproducing signal amplifier, and each of the other terminals of said magnetic transducers being connected together to a recording signal source; a selecting switch for selecting one of said switching circuits for operation thereof; first biasing means for applying a bias to the base of the transistor in the selected switching circuit through said selecting switch during the recording operation of the selected switching circuit; second biasing means for applying a bias to the base of the transistor in the selected switching circuit through said selecting switch during the reproducing operation of the selected switching circuit; and third biasing means for applying a forward bias to the rectifier means provided in one branch of said full wave rectifier circuit of the selected switching circuit and for applying a reverse bias to the rectifier means provided in the other three branches of said full wave rectifier circuit of the selected switching circuit during the reproducing operation thereof, thereby biasing said transistor of the selected switching circuit in the saturation region and transferring recording signals from the recording signal source to the magnetic transducer corresponding to the selected switching circuit during the recording operation thereof, and biasing said transistor of the selected switching circuit in an active region and transferring reproducing signals from the magnetic transducer corresponding to the selected switching circuit to the reproducing signal amplifier through said transistor and the rectifier means of the one branch of said full wave rectifier circuit of the selected switching circuit during reproducing operation thereof.
Claim 8
Dependent Claim 61 words
A control circuit for recording and reproducing signals to and from magnetic transducers for magnetic memory apparatus as claimed in claim 5, further comprising diode means being connected between each collector of said transistors and the reproducing signal amplifier for isolating the selected switching circuit from the non-selected switching circuit during the recording and reproducing operation of the selected switching circuit.
Claim 9
Dependent Claim 391 words
A control circuit for recording and reproducing signals to and from magnetic transducers for magnetic memory apparatus comprising: a plurality of switching circuits, each of which having a full wave rectifier circuit and a transistor, the collector and emitter of said transistor being connected between output terminals of said full wave rectifier circuit, one input terminal of said full wave rectifier circuit being connected to one terminal of each corresponding magnetic transducer, the other input terminal of said full wave rectifier circuit being connected to ground, each collector of said transistors being connected together to a reproducing signal amplifier, and each of the other terminals of said magnetic transducers being connected together to a recording signal source; a selecting switch for selecting one of said switching circuits for operation thereof; first biasing means for applying a bias to the base of the transistor in the selected switching circuit through said selecting switch during recording operation of the selected switching circuit; second biasing means for applying a bias to the base of the transistor in the selected switching circuit through said selecting switch during the reproducing operation of the selected switching circuit; third biasing means for applying a forward bias to the rectifier means provided in one branch of said full wave rectifier circuit between the emitter terminal of the transistor of the selected switching circuit and the one terminal of the corresponding magnetic transducer and for applying reverse bias to the rectifier means provided in the other three branches of said full wave rectifier circuit of the selected switching circuit; and diode means, connected between each collector of said transistors and the reproducing signal amplifier, for separating the selected switching circuit from the non-selected switching circuits during the recording and reproducing operation of the selected switching circuit, thereby biasing said transistor of the selected switching circuit to saturation and transferring recording signals from the recording signal source to the magnetic transducer corresponding to the selected switching circuit during the recording operation thereof, and biasing said transistor of the selected switching circuit to an active region and transferring reproducing signals from the magnetic transducer corresponding to the selected switching circuit to the reproducing signal amplifier through said transistor and the rectifier means of the one branch of said full wave rectifier circuit of the selected switching circuit during the reproducing operation thereof.
Claim 10
Dependent Claim 391 words
A control circuit for recording and reproducing signals to and from magnetic transducers for magnetic memory apparatus comprising: a plurality of switching circuits, each of which having a full wave rectifier circuit and a transistor, the collector and emitter of said transistor being connected between output terminals of said full wave rectifier circuit, one input terminal of said full wave rectifier circuit being connected to one terminal of each corresponding magnetic transducer, the other input terminal of said full wave rectifier circuit being connected to ground, each collector of said transistors being connected together to a reproducing signal amplifier, and each of the other terminals of said magnetic transducers being connected together to a recording signal source; a selecting switch for selecting one of said switching circuits for operation thereof; first biasing means for applying a bias to the base of the transistor in the selected switching circuit through said selecting switch during recording operation of the selected switching circuit; second biasing means for applying a bias to the base of the transistor in the selected switching circuit through said selecting switch during the reproducing operation of the selected switching circuit; third biasing means for applying a forward bias to the rectifier means provided in one branch of said full wave rectifier circuit between the emitter terminal of the transistor of the selected switching circuit and the one terminal of the corresponding magnetic transducer and for applying reverse bias to the rectifier means provided in the other three branches of said full wave rectifier circuit of the selected switching circuit; and diode means, connected between each collector of said transistors and the reproducing signal amplifier, for separating the selected switching circuit from the non-selected switching circuits during the recording and reproducing operation of the selected switching circuit, thereby biasing said transistor of the selected switching circuit to saturation and transferring recording signals from the recording signal source to the magnetic transducer corresponding to the selected switching circuit during the recording operation thereof, and biasing said transistor of the selected switching circuit to an active region and transferring reproducing signals from the magnetic transducer corresponding to the selected switching circuit to the reproducing signal amplifier through said transistor and the rectifier means of the one branch of said full wave rectifier circuit of the selected switching circuit during the reproducing operation thereof.

References Cited (Backward Citations)

US2926298A Cited
US3115621A Cited
US3152322A Cited
US3119095A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-05-06 1977-11-05 1978-05-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-05-06 1981-11-05 1982-05-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-05-06 1985-11-05 1986-05-07 $7700.00 Window Closed / Lapsed

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