US3119095A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Diode head select matrix
Assignee: Unisys Corp
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Filing: 1962-01-02
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Granted: 1964-01-21
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Expires: 1982-01-02
Abstract
No abstract record available.
Inventors
- 👤 Iver C Hansen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 15:14
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/62; H03K17/6285; H03K17/6257
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
174 words
A MAGNETIC RECORDING HEAD SWITCHING CIRCUIT COMPRISING A PLURALITY OF LOW IMPEDANCE MAGNETIC HEADS ARRANGED IN A MATRIX OF COLUMNS AND ROWS, A CAPACITOR AND RESISTOR ASSOCIATED WITH EACH HEAD AND CONNECTED IN SERIES WITH EACH HEAD BETWEEN GROUND AND A POTENTIAL SOURCE, FIRST AND SECOND DIODES ASSOCIATED WITH EACH HEAD CONNECTED AT ONE END TO A COMMON JUNCTION WITH THE RESISTOR AND THE CAPACITOR, THE OTHER ENDS OF THE FIRST DIODES IN EACH COLUMN OF HEADS BEING CONNECTED TO A COLUMN INPUT TERMINAL, THE OTHER ENDS OF THE SECOND DIODES IN EACH ROW BEING CONNECTED TO A COMMON JUNCTION, A PLURALITY OF CONTROL DIODES, ONE CONTROL DIODE BEING CONNECTED BETWEEN A ROW INPUT TERMINAL AND SAID COMMON JUNCTION OF THE ASSOCIATED ROW, AND A SIGNAL CIRCUIT INCLUDING A VOLTAGE DIVIDER NETWORK AND A PLURALITY OF SIGNAL COUPLING DIODES, MON POINT ON THE VOLTAGE DIVIDER NETWORK AND ONE OF SAID COMMON JUNCTIONS, WHEREBY EACH ROW OF THE MATRIX IS CONNECTED BY A SIGNAL COUPLING DIODE TO THE COMMON POINT ON THE VOLTAGE DIVIDER NETWORK.
Claim 2
Dependent Claim
174 words
A MAGNETIC RECORDING HEAD SWITCHING CIRCUIT COMPRISING A PLURALITY OF LOW IMPEDANCE MAGNETIC HEADS ARRANGED IN A MATRIX OF COLUMNS AND ROWS, A CAPACITOR AND RESISTOR ASSOCIATED WITH EACH HEAD AND CONNECTED IN SERIES WITH EACH HEAD BETWEEN GROUND AND A POTENTIAL SOURCE, FIRST AND SECOND DIODES ASSOCIATED WITH EACH HEAD CONNECTED AT ONE END TO A COMMON JUNCTION WITH THE RESISTOR AND THE CAPACITOR, THE OTHER ENDS OF THE FIRST DIODES IN EACH COLUMN OF HEADS BEING CONNECTED TO A COLUMN INPUT TERMINAL, THE OTHER ENDS OF THE SECOND DIODES IN EACH ROW BEING CONNECTED TO A COMMON JUNCTION, A PLURALITY OF CONTROL DIODES, ONE CONTROL DIODE BEING CONNECTED BETWEEN A ROW INPUT TERMINAL AND SAID COMMON JUNCTION OF THE ASSOCIATED ROW, AND A SIGNAL CIRCUIT INCLUDING A VOLTAGE DIVIDER NETWORK AND A PLURALITY OF SIGNAL COUPLING DIODES, MON POINT ON THE VOLTAGE DIVIDER NETWORK AND ONE OF SAID COMMON JUNCTIONS, WHEREBY EACH ROW OF THE MATRIX IS CONNECTED BY A SIGNAL COUPLING DIODE TO THE COMMON POINT ON THE VOLTAGE DIVIDER NETWORK.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1967-01-20 | 1967-07-22 | 1968-01-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1971-01-20 | 1971-07-22 | 1972-01-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1975-01-20 | 1975-07-22 | 1976-01-21 | $7700.00 | Window Closed / Lapsed |