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Patent US3808409A successfully refreshed from Google Patents.
US3808409A
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Loadflow computer and dc circuit modules empolyed therein for simulating ac electric power networks
Assignee: Westinghouse Electric Corp
•
Filing: 1971-08-26
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Granted: 1974-04-30
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Expires: 1991-08-26
Abstract
Abstract A hybrid loadflow computer arrangement includes a modularized analog network simulator and a digital computer which acquires and processes on-line data and operator data related to the power system for which a loadflow problem is being solved. The analog simulator includes modular circuits representative of power system busses and lines and the interface between the digital computer and the analog network simulator is provided by analogto-digital and digital-to-analog converters and by line outage contact closure outputs. The hybrid arrangement operates iteratively, with the analog network simulator providing a bus voltage solution for a set of network simultaneous equations and the digital computer providing bus load and generation injection current calculations and convergence steering control. The modular bus and line circuits are interconnected to simulate the power system and operate stably in forcing currents and voltages to satisfy current and voltage laws to provide the bus voltage solution. Integrated circuit operational amplifiers are employed as error current integrators in bus modules and as voltage difference amplifiers in line modules.
Inventors
- 👤 M Enns
- 👤 P Haley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 13:26
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/48; G06G7/62; G06G7/63; G06J; G06J1/00
Claims Analysis
Total Claims: 63
Claim 1
Independent Claim
141 words
A DC circuit for representing an electric power system line comprising a first circuit for generating at least one output current phasor signal corresponding to a first coordinate component of at least the equivalent series branch current for the actual line, a second circuit for generating at least one other output current phasor signal corresponding to a second coordinate component of at least the equivalent series branch current for the actual line, each of said first and second circuits including means for receiving respective input phasor voltage signals corresponding to one of the two coordinate components of respective voltages at busses connected to the line in the actual power system, and means for representing at least the equivalent series branch line impedance in said first and second circuits so as to generate said output current phasor signals with the described correspondence.
Claim 2
Dependent Claim
141 words
A DC circuit for representing an electric power system line comprising a first circuit for generating at least one output current phasor signal corresponding to a first coordinate component of at least the equivalent series branch current for the actual line, a second circuit for generating at least one other output current phasor signal corresponding to a second coordinate component of at least the equivalent series branch current for the actual line, each of said first and second circuits including means for receiving respective input phasor voltage signals corresponding to one of the two coordinate components of respective voltages at busses connected to the line in the actual power system, and means for representing at least the equivalent series branch line impedance in said first and second circuits so as to generate said output current phasor signals with the described correspondence.
Claim 3
Dependent Claim
55 words
A DC circuit as set forth in claim 1 wherein said receiving means includes an inverter connected in said first circuit for reversing the polarity of one of its two input phasor voltage signals, and an inverter connected in said second circuit for reversing the polarity of one of its two input phasor voltage signals.
Claim 4
Dependent Claim
33 words
A DC circuit as set forth in claim 2 wherein means are provided for opening and closing the circuit continuity between the input and output of each of said first and second circuits.
Claim 5
Dependent Claim
36 words
A DC circuit as set forth in claim 1 wherein each of said first and second circuits includes a comparator amplifier for generating a signal corresponding to the difference between the two input phasor voltage signals.
Claim 6
Dependent Claim
61 words
A DC circuit as set forth in claim 1 wherein each of said first and second circuits includes an output amplifier for generating the associated output current phasor signal, and at least one of said circuits includes an inverter for generating the output current phasor signal for that circuit with a polarity opposite from the polarity of the actual line current.
Claim 7
Dependent Claim
40 words
A DC circuit as set forth in claim 5 wherein each of said circuits includes an inverter for the described purpose and each of said circuits includes a pair of opposite polarity outputs for the associated output current phasor signal.
Claim 8
Dependent Claim
27 words
A DC circuit as set forth in claim 5 wherein means are provided for disconnecting the output amplifier from the circuit output in each of said circuits.
Claim 9
Dependent Claim
40 words
A DC circuit as set forth in claim 5 wherein means are provided for disconnecting the output amplifier from the circuit output in each of said circuits and means are provided for grounding the input of said output current inverter.
Claim 10
Dependent Claim
32 words
A DC circuit as set forth in claim 5 wherein means are provided for opening and closing the circuit circuit with a polarity opposite from the polarity of the actual line current.
Claim 11
Dependent Claim
33 words
A DC circuit as set forth in claim 1 wherein means are provided for opening and closing the circuit continuity between the input and output of each of said first and second circuits.
Claim 12
Dependent Claim
115 words
A DC circuit as set forth in claim 1 wherein each of said circuits includes an output summing amplifier for generating the associated output current phasor signal, each of said circuits includes a comparator amplifier for generating a signal corresponding to the difference between the two input phasor voltage signals, the outputs of said comparator amplifiers are coupled to the input of said output amplifier in said first circuit, an inverter is provided for inverting the output of said comparator amplifier in said first circuit, and the output of said comparator amplifier in said second circuit and the output of said inverter are coupled to the input of said output amplifier in said second circuit.
Claim 13
Dependent Claim
112 words
A DC circuit as set forth in claim 11 wherein said impedance representing means include a gain resistor corresponding to equivalent series line conductance connected in said first circuit between its comparator and output amplifiers, a gain resistor corresponding to equivalent series line conductance is connected in said second circuit between its comparator and output amplifiers, a gain resistor corresponding to equivalent series line susceptance is connected between the output of said second circuit comparator amplifier and the input of said first circuit output amplifier, and a gain resistor corresponding to equivalent series line susceptance is connected between the output of said inverter and the input of said second circuit output amplifier.
Claim 14
Dependent Claim
55 words
A DC circuit as set forth in claim 12 wherein said receiving means includes an inverter connected in said first circuit for reversing the polarity of one of its two input phasor voltage signals, and an inverter connected in said second circuit for reversing the polarity of one of its two input phasor voltage signals.
Claim 15
Dependent Claim
33 words
A DC circuit as set forth in claim 13 wherein means are provided for opening and closing the circuit continuity between the input and output of each of said first and second circuits.
Claim 16
Dependent Claim
41 words
A DC circuit as set forth in claim 12 wherein at least one of said circuits includes an inverter for generating the output current phasor signal for that circuit with a polarity opposite from the polarity of the actual line current.
Claim 17
Dependent Claim
33 words
A DC circuit as set forth in claim 15 wherein means are provided for opening and closing the circuit continuity between the input and output of each of said first and second circuits.
Claim 18
Dependent Claim
33 words
A DC circuit as set forth in claim 12 wherein means are provided for opening and closing the circuit continuity between the input and output of each of said first and second circuits.
Claim 19
Dependent Claim
41 words
A DC circuit as set forth in claim 11 wherein at least one of said circuits includes an inverter for generating the output current phasor signal for that circuit with a polarity opposite from the polarity of the actual line current.
Claim 20
Dependent Claim
27 words
A DC circuit as set forth in claim 11 wherein means are provided for disconnecting the output amplifier from the circuit output in each of said circuits.
Claim 21
Dependent Claim
24 words
A DC circuit as set forth in claim 11 wherein each of said comparator amplifiers and said output amplifiers are integrated circuit operational amplifiers.
Claim 22
Dependent Claim
57 words
A DC circuit as set forth in claim 1 wherein said first and second circuits operate with signals representative of real and imaginary currents and voltages in X and Y coordinates and wherein real voltage and phasor signals are associated with said first circuit and imaginary voltage and current phasor signals are associated with said second circuit.
Claim 23
Dependent Claim
22 words
A DC circuit as set forth in claim 1 wherein said representing means provides a representation of the equivalent series branch admittance.
Claim 24
Dependent Claim
85 words
A DC circuit for representing an electric power system line comprising a first circuit for generating an output current phasor signal corresponding to the sum Gpq (Epr - Eqr ) + Bpq (Epi - Eqi) , a second circuit for generating an output current phasor signal corresponding to the sum -Bpq (Epr - Eqr ) + Gpq (Epi - Eqi), and means for receiving input bus phasor voltage signals corresponding to Epr, Eqr, Epi and Eqi and for applying the input signals to said circuits.
Claim 25
Dependent Claim
85 words
A DC circuit for representing an electric power system line comprising a first circuit for generating an output current phasor signal corresponding to the sum Gpq (Epr - Eqr ) + Bpq (Epi - Eqi) , a second circuit for generating an output current phasor signal corresponding to the sum -Bpq (Epr - Eqr ) + Gpq (Epi - Eqi), and means for receiving input bus phasor voltage signals corresponding to Epr, Eqr, Epi and Eqi and for applying the input signals to said circuits.
Claim 26
Dependent Claim
55 words
A DC circuit as set forth in claim 23 wherein said receiving means includes an inverter connected in said first circuit for reversing the polarity of one of its two input phasor voltage signals, and an inverter connected in said second circuit for reversing the polarity of one of its two input phasor voltage signals.
Claim 27
Dependent Claim
61 words
A DC circuit as set forth in claim 23 wherein each of said first and second circuits includes an output amplifier for generating the associated output current phasor signal, and at least one of said circuits includes an inverter for generating the output current phasor signal for that circuit with a polarity opposite from the polarity of the actual line current.
Claim 28
Dependent Claim
33 words
A DC circuit as set forth in claim 23 wherein means are provided for opening and closing the circuit continuity between the input and output of each of said first and second circuits.
Claim 29
Dependent Claim
172 words
A printed circuit card comprising a plurality of DC circuits representing respective electric power system lines, each of said modules including a first circuit for generating at least one output current phasor signal corresponding to a first coordinate component of at least the equivalent series branch current for the actual line, a second circuit for generating at least one other output current phasor signal corresponding to a second coordinate component of at least the equivalent series branch current for the actual line, each of said first and second circuits including means for receiving respective input phasor voltage signals corresponding to one of the two coordinate components of respective voltages at busses connected to the line in the actual power system, and means for representing at least the equivalent series branch line impedance in said first and second circuits so as to generate said output current phasor signals with the described correspondence, said impedance representing means in the respective modules corresponding to the respective actual power system lines represented by the respective modules.
Claim 30
Dependent Claim
172 words
A printed circuit card comprising a plurality of DC circuits representing respective electric power system lines, each of said modules including a first circuit for generating at least one output current phasor signal corresponding to a first coordinate component of at least the equivalent series branch current for the actual line, a second circuit for generating at least one other output current phasor signal corresponding to a second coordinate component of at least the equivalent series branch current for the actual line, each of said first and second circuits including means for receiving respective input phasor voltage signals corresponding to one of the two coordinate components of respective voltages at busses connected to the line in the actual power system, and means for representing at least the equivalent series branch line impedance in said first and second circuits so as to generate said output current phasor signals with the described correspondence, said impedance representing means in the respective modules corresponding to the respective actual power system lines represented by the respective modules.
Claim 31
Dependent Claim
58 words
A printed circuit card as set forth in claim 27 wherein all of said receiving means includes an inverter connected in said first circuit for reversing the polarity of one of its two input phasor voltage signals, and an inverter connected in said second circuit for reversing the polarity of one of its two input phasor voltage signals.
Claim 32
Dependent Claim
62 words
A printed circuit card as set forth in claim 27 wherein each of said first and second circuits includes an output amplifier for generating the associated output current phasor signal, and at least one of said circuits includes an inverter for generating the output current phasor signal for that circuit with a polarity opposite from the polarity of the actual line current.
Claim 33
Dependent Claim
34 words
A printed circuit card as set forth in claim 27 wherein means are provided for opening and closing the circuit continuity between the input and output of each of said first and second circuits.
Claim 34
Dependent Claim
178 words
A DC circuit for representing an electric power system bus comprising a first circuit for generating at least one output voltage phasor signal corresponding to a first coordinate component of the voltage at the actual bus, a second circuit for generating at least one other output voltage phasor signal corresponding to a second coordinate component of the voltage at the actual bus, each of said first and second circuits including first means for receiving respective input phasor current signals corresponding to one of the two coordinate components of at least the equivalent series branch portion of respective currents at least in lines connected to the bus in the actual power system, each of said first and second circuits including second means for receiving at least one input phasor current signal corresponding to one of the two coordinate components of bus generation and load current, each of said first and said second circuits including means for algebRaically summing the phasor current signals applied thereto and for integrating the resultant sum to generate the output voltage phasor signal associated therewith.
Claim 35
Dependent Claim
178 words
A DC circuit for representing an electric power system bus comprising a first circuit for generating at least one output voltage phasor signal corresponding to a first coordinate component of the voltage at the actual bus, a second circuit for generating at least one other output voltage phasor signal corresponding to a second coordinate component of the voltage at the actual bus, each of said first and second circuits including first means for receiving respective input phasor current signals corresponding to one of the two coordinate components of at least the equivalent series branch portion of respective currents at least in lines connected to the bus in the actual power system, each of said first and second circuits including second means for receiving at least one input phasor current signal corresponding to one of the two coordinate components of bus generation and load current, each of said first and said second circuits including means for algebRaically summing the phasor current signals applied thereto and for integrating the resultant sum to generate the output voltage phasor signal associated therewith.
Claim 36
Dependent Claim
31 words
A DC circuit as set forth in claim 31 wherein a single operational amplifier is employed to provide the summation and integration functions in each of said first and second circuits.
Claim 37
Dependent Claim
83 words
A DC circuit as set forth in claim 32 wherein said first and second circuits operate with signals representative of real and imaginary currents and voltages in X and Y coordinates, said first and second receiving means in said first circuit provided to receive imaginary input phasor current signals, said first and second receiving means in said second circuit provided to receive real input phasor current signals, and said first and second circuits respectively generating real and imaginary output bus voltage phasor signals.
Claim 38
Dependent Claim
23 words
A DC circuit as set forth in claim 31 wherein integrated circuit operational amplifiers are employed to provide the summation and integration functions.
Claim 39
Dependent Claim
29 words
A DC circuit as set forth in claim 31 wherein separate amplifiers are employed to provide the summation and integration functions in each of said first and second circuits.
Claim 40
Dependent Claim
41 words
A DC circuit as set forth in claim 35 wherein means are provided for cross-coupling the output of the summer amplifier in at least one of said circuits with the input of the integrator amplifier in the other of said circuits.
Claim 41
Dependent Claim
31 words
A DC circuit as set forth in claim 31 wherein said first and second circuits operate with signals representative of real and imaginary currents and voltages in X and Y coordinates.
Claim 42
Dependent Claim
42 words
A DC circuit as set forth in claim 31 wherein said second receiving means in each of said first and second circuits includes multiple connectable or disconnectable resistors to provide selective scalings for the associated input bus generation and load current signal.
Claim 43
Dependent Claim
188 words
A printed circuit card comprising a plurality of DC circuits representing respective electric power system busses, each of said modules including a first circuit for generating at least one output voltage phasor signal corresponding to a first coordinate component of the voltage at the actual bus, a second circuit for generating at least one other output voltage phasor signal corresponding to a second coordinate component of the voltage at the actual bus, each of said first and second circuits including first means for receiving respective input phasor current signals corresponding to one of the two coordinate components of at least the equivalent series branch portion of respective currents at least in lines connected to the bus in the actual power system, each of said first and second circuits including second means for receiving at least one input phasor current signal corresponding to one of the two coordinate components of bus generation and load current, each of said first and said second circuits including means for algebraically summing the phasor current signals applied thereto and for integrating the resultant sum to generate the output voltage phasor signal associated therewith.
Claim 44
Dependent Claim
188 words
A printed circuit card comprising a plurality of DC circuits representing respective electric power system busses, each of said modules including a first circuit for generating at least one output voltage phasor signal corresponding to a first coordinate component of the voltage at the actual bus, a second circuit for generating at least one other output voltage phasor signal corresponding to a second coordinate component of the voltage at the actual bus, each of said first and second circuits including first means for receiving respective input phasor current signals corresponding to one of the two coordinate components of at least the equivalent series branch portion of respective currents at least in lines connected to the bus in the actual power system, each of said first and second circuits including second means for receiving at least one input phasor current signal corresponding to one of the two coordinate components of bus generation and load current, each of said first and said second circuits including means for algebraically summing the phasor current signals applied thereto and for integrating the resultant sum to generate the output voltage phasor signal associated therewith.
Claim 45
Dependent Claim
50 words
A printed circuit card as set forth in claim 39 wherein all of said first input receiving means include a plurality of connectable or disconnectable input resistors disposed on the card to provide respective inputs for line current phasor signals to be applied variously to said first and second circuits.
Claim 46
Dependent Claim
43 words
A printed circuit card as set forth in claim 40 wherein said second receiving means in each of said first and second circuits includes multiple connectable or disconnectable resistors to provide selective scalings for the associated input bus generation and load current signal.
Claim 47
Dependent Claim
136 words
A DC analog simulator for AC power networks comprising a plurality of bus DC circuits and a plurality of line DC circuits, said bus DC circuits including first and second circuits for generating respective output voltage phasor signals corresponding to first and second coordinate compOnents of the voltages at the respective busses, said line DC circuits including third and fourth circuits for generating respective output current phasor signals corresponding to the first and second coordinate components of at least the equivalent series branch currents for the actual lines, and means for coupling outputs of said first and second circuits to inputs of said third and fourth circuits and outputs of said third and fourth circuits to inputs of said first and second circuits in a manner corresponding to line and bus interconnections in the AC network.
Claim 48
Dependent Claim
136 words
A DC analog simulator for AC power networks comprising a plurality of bus DC circuits and a plurality of line DC circuits, said bus DC circuits including first and second circuits for generating respective output voltage phasor signals corresponding to first and second coordinate compOnents of the voltages at the respective busses, said line DC circuits including third and fourth circuits for generating respective output current phasor signals corresponding to the first and second coordinate components of at least the equivalent series branch currents for the actual lines, and means for coupling outputs of said first and second circuits to inputs of said third and fourth circuits and outputs of said third and fourth circuits to inputs of said first and second circuits in a manner corresponding to line and bus interconnections in the AC network.
Claim 49
Dependent Claim
56 words
A loadflow computer including an analog simulator as set forth in claim 42 wherein means are provided for generating phasor current signals corresponding to the coordinate components of bus generation and load currents, and means for applying the phasor current input signals to inputs of the respectively associated first and second circuits of said bus circuits.
Claim 50
Dependent Claim
197 words
A DC analog network simulator as set forth in claim 42 wherein each of said first and second circuits including first means for receiving respective input phasor current signals corresponding to one of the two coordinate components of at least the equivalent series branch portion of respective currents at least in lines connected to the bus in the actual power system each of said first and second circuits including second means for receiving at least one input phasor current signal corresponding to one of the two coordinate components of bus generation and load current, each of said first and said second circuits including means for algebraically summing the phasor current signals applied thereto and for integrating the resultant sum to generate the output voltage phasor signal associated therewith, each of said first and second circuits including means for receiving respective input phasor voltage signals corresponding to one of the two coordinate components of respective voltages at busses connected to the line in the actual power system, and means for representing at least the equivalent series branch line impedance in said first and second circuits so as to generate said output current phasor signals with the described correspondence.
Claim 51
Dependent Claim
31 words
A DC analog network simulator as set forth in claim 44 wherein means are provided for inverting one of the two bus voltage phasor signals for each of said line circuits.
Claim 52
Dependent Claim
55 words
A DC analog network simulator as set forth in claim 44 wherein means are provided for inverting one of the two output bus voltage phasor signals for each of said bus circuits, said coupling means applying the inverted voltage phasor signals to the inputs of the associated third or fourth circuits in said line circuits.
Claim 53
Dependent Claim
58 words
A DC analog network simulator as set forth in claim 46 wherein said first and second and said third and fourth circuits operate with output signals respectively representative of real and imaginary quantities and wherein said inverting means inverts the imaginary output bus voltage phasor signals as a negative feedback input to the associated fourth imaginary line circuits.
Claim 54
Dependent Claim
106 words
A DC analog network simulator as set forth in claim 44 wherein said first and second and said third and fourth circuits operate the output signals respectively representative of real and imaginary quantities and wherein means are provided for cross-coupling signals between said first real and second imaginary circuits in all of said bus circuits so that said integrating means in said first real circuits operate on at least part of signals derived from the associated imaginary bus circuit inputs and so that said integrating means in said second imaginary circuits operate on at least part of signals derived from the associated real bus circuit inputs.
Claim 55
Dependent Claim
80 words
A DC analog network simulator as set forth in claim 48 wherein a single operational amplifier is employed to provide the summation and integration functions in each of said first and second circuits and wherein said cross-coupling means provides the bus circuit cross-couPling by connecting real line output phasor current signals to the inputs for the imaginary output bus voltage operational amplifiers and imaginary line output phasor current signals to the inputs for the real output bus voltage operational amplifiers.
Claim 56
Dependent Claim
56 words
A DC analog network simulator as set forth in claim 49 wherein means are provided for generating phasor current signals corresponding to the coordinate components of bus generation and load currents, and wherein real and imaginary components of the generation and load currents are applied respectively to the imaginary and real output bus voltage operational amplifiers.
Claim 57
Dependent Claim
55 words
A DC analog network simulator as set forth in claim 49 wherein means are provided for inverting one of the two output bus voltage phasor signals for each of said bus circuits, said coupling means applying the inverted voltage phasor signals to the inputs of the associated third or fourth circuits in said line circuits.
Claim 58
Dependent Claim
60 words
A DC analog network simulator as set forth in claim 42 wherein said coupling means connects the outputs of said first circuits said second circuits with the corresponding third and fourth circuit inputs so as to form a control loop with negative feedback from the bus circuits to the line circuits for one of the two phasor signal circuit channels.
Claim 59
Dependent Claim
35 words
A DC analog network simulator as set forth in claim 42 wherein means are provided for opening and closing the circuit continuity between the input and output of each of said first and second circuits.
Claim 60
Dependent Claim
44 words
A DC analog network simulator as set forth in claim 42 wherein at least one of the simulator bus circuits is selected as a slack bus circuit, and means are provided for holding the slack bus output voltage phasor signals at a reference value.
Claim 61
Dependent Claim
43 words
A DC analog network simulator as set forth in claim 54 wherein the slack voltage is referenced to ground and all of said bus and line circuits are formed substantially without any circuit path coupling to ground other than through the slack bus.
Claim 62
Dependent Claim
168 words
A DC analog network simulator comprising a plurality of printed circuit cards, some of said cards having at least one bus DC circuit disposed thereon, others of said cards having at least one line DC circuit disposed thereon, said bus DC circuits including first and second circuits for generating respective output voltage phasor signals corresponding to first and second coordinate components of the voltages at the respective busses, said line DC circuits including third and fourth circuits for generating respective output current phasor signals corresponding to the first and second coordinate components of at least the equivalent series branch currents for the actual lines, and means for coupling outputs of said first and second circuits to inputs of said third and fourth circuits and outputs of said third and fourth circuits to inputs of said first and second circuits in a manner corresponding to line and bus interconnections in the AC network, said coupling means including wiring interconnecting card inputs and outputs in accordance with the manner described.
Claim 63
Dependent Claim
168 words
A DC analog network simulator comprising a plurality of printed circuit cards, some of said cards having at least one bus DC circuit disposed thereon, others of said cards having at least one line DC circuit disposed thereon, said bus DC circuits including first and second circuits for generating respective output voltage phasor signals corresponding to first and second coordinate components of the voltages at the respective busses, said line DC circuits including third and fourth circuits for generating respective output current phasor signals corresponding to the first and second coordinate components of at least the equivalent series branch currents for the actual lines, and means for coupling outputs of said first and second circuits to inputs of said third and fourth circuits and outputs of said third and fourth circuits to inputs of said first and second circuits in a manner corresponding to line and bus interconnections in the AC network, said coupling means including wiring interconnecting card inputs and outputs in accordance with the manner described.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-04-29 | 1977-10-29 | 1978-04-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-04-29 | 1981-10-29 | 1982-04-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-04-29 | 1985-10-29 | 1986-04-30 | $7700.00 | Window Closed / Lapsed |