Patent US1999021A successfully refreshed from Google Patents.
Patent US3802065A successfully refreshed from Google Patents.
US3802065A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and structure for mounting semiconductor chips
Assignee: General Electric Co
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Filing: 1972-03-16
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Granted: 1974-04-09
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Expires: 1992-03-16
Abstract
Abstract Individual semiconductor chips are bonded to each of a plurality of tabs etched in a base component. The chips may be attached to the tabs at a temperature suitable for forming a eutectic goldsemiconductor bond. Each chip is supported by a single tab. In this configuration, the chips may be tested, cleaned, and inspected as a group. The resultant chip and tab subassemblies may be individually removed from the batch handling configuration and then attached in a circuit through a low temperature attachment process.
Inventors
- 👤 L Vosburgh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 05:36
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/20; H10W72/071; H10W72/073; H10W72/07331; H10W72/07336; H10W90/00; H10W90/701; H10W90/731; H10W90/736; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49004
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
232 words
A method of mounting on mounting pads those fabricated electronic devices having a semiconductor base substance comprising the steps of: a. forming from a piece of base material a plurality of tab members each connected to a common frame member by a neck portion, said base material having thermal expansion properties compatible with the thermal expansion properties of the semiconductor base substance of said devices, said base material being coated with a surface layer of a metallic substance, said metallic substance and said semiconductor base being characterized by their being fusible together at a eutectic temperature which is lower than a temperature which will damage said devices; b. heating said interconnected frame member, tab members, and necks to a temperature slightly higher than said eutectic temperature; c. placing an individual electronic device having a semiconductor base material face up on each of a plurality of said coated tab members of said heated frame member to effect a eutectic bond between said semiconductor base material and said metallic substance to form a plurality of electronic subassemblies; d. testing said subassemblies and removing any deficient subassemblies; e. removing said tested subassemblies from said frame member; and f. attaching said subassemblies to said mounting pads at temperatures substantially less than said eutectic temperature whereby said devices are mounted on said pads with a minimum heat damage to said devices and to other proximate electronic components.
Claim 2
Independent Claim
232 words
A method of mounting on mounting pads those fabricated electronic devices having a semiconductor base substance comprising the steps of: a. forming from a piece of base material a plurality of tab members each connected to a common frame member by a neck portion, said base material having thermal expansion properties compatible with the thermal expansion properties of the semiconductor base substance of said devices, said base material being coated with a surface layer of a metallic substance, said metallic substance and said semiconductor base being characterized by their being fusible together at a eutectic temperature which is lower than a temperature which will damage said devices; b. heating said interconnected frame member, tab members, and necks to a temperature slightly higher than said eutectic temperature; c. placing an individual electronic device having a semiconductor base material face up on each of a plurality of said coated tab members of said heated frame member to effect a eutectic bond between said semiconductor base material and said metallic substance to form a plurality of electronic subassemblies; d. testing said subassemblies and removing any deficient subassemblies; e. removing said tested subassemblies from said frame member; and f. attaching said subassemblies to said mounting pads at temperatures substantially less than said eutectic temperature whereby said devices are mounted on said pads with a minimum heat damage to said devices and to other proximate electronic components.
Claim 3
Dependent Claim
59 words
A method according to claim 1 wherein the temperature to which the frame member is heated is approximately 400*C and the temperature for attaching said subassemblies to said moutnting pads is less than 200*C and wherein said metallic substance contains gold, said base material is an alloy comprising Ni, Fe, and Co, and said semiconductor base substance is silicon.
Claim 4
Dependent Claim
52 words
A method according to claim 1 wherein the temperature to which the frame member is heated is approximately 400*C, the temperature for attaching said subassemblies to said mounting pads is less than 200*C and wherein said metallic substance contains gold, said base material is molybdenum and said semiconductor base substance is silicon.
Claim 5
Dependent Claim
58 words
A method according to claim 1 wherein the temperature to which the frame member is heated is approximately 390*C, the temperature for attaching said subassemblies to said mounting pads is less than 200*C, and wherein said metallic substance contains gold, said base material is an alloy consisting of Fe, Ni, Co, and said semiconductor base substance is germanium.
Claim 6
Dependent Claim
216 words
A low temperature method of mounting operational electronic semiconductor devices on mounting pads on a substrate board with a minimum casualty loss of such devices and with minimum damage to other electronic components mounted on said substrate board comprising the steps of: a. forming a unitary frame, tab members and neck portions interconnecting said tab members and frame of an electrically conducting material having a thermal coefficient of expansion compatible with the thermal expansion of silicon, said material having a layer of gold plated on one surface; b. heating said frame, tab members and neck portions to temperature slightly above the eutectic temperature for silicon-gold; c. placing an individual silicon base operational electronic semiconductor device face up on the gold plated surface of each of a plurality of said tab members to effect a eutectic bond between said device and tab member to cause each said tab on which a device is mounted to form a subassembly; d. cooling and retaining said frame member and attached subassemblies at a temperature less than said eutectic temperature; e. testing said subassemblies and removing those subassemblies which are inadequate; f. removing a tested subassembly from said frame; g. attaching said tested subassembly removed from said frame to said pad by soft soldering at a temperature not to exceed 200*C.
Claim 7
Dependent Claim
216 words
A low temperature method of mounting operational electronic semiconductor devices on mounting pads on a substrate board with a minimum casualty loss of such devices and with minimum damage to other electronic components mounted on said substrate board comprising the steps of: a. forming a unitary frame, tab members and neck portions interconnecting said tab members and frame of an electrically conducting material having a thermal coefficient of expansion compatible with the thermal expansion of silicon, said material having a layer of gold plated on one surface; b. heating said frame, tab members and neck portions to temperature slightly above the eutectic temperature for silicon-gold; c. placing an individual silicon base operational electronic semiconductor device face up on the gold plated surface of each of a plurality of said tab members to effect a eutectic bond between said device and tab member to cause each said tab on which a device is mounted to form a subassembly; d. cooling and retaining said frame member and attached subassemblies at a temperature less than said eutectic temperature; e. testing said subassemblies and removing those subassemblies which are inadequate; f. removing a tested subassembly from said frame; g. attaching said tested subassembly removed from said frame to said pad by soft soldering at a temperature not to exceed 200*C.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-04-08 | 1977-10-08 | 1978-04-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-04-08 | 1981-10-08 | 1982-04-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-04-08 | 1985-10-08 | 1986-04-09 | $7700.00 | Window Closed / Lapsed |