Pulse width discriminator

Claim 2

A pulse width discriminator comprising an input terminal for receving input pulses having various durations, an output terminal, a source of reference potential, first and second transistors each having base, emitter and collector electrodes, means for directly connecting the collector electrode of said first transistor to the collector electrode of said second transistor and to said output terminal, means for directly connecting the emitter electrode of said first transistor to the emitter electrode of said second transistor and to said source of reference potential, a differentiating network connected in a first signal path between said input terminal and the base electrode of said first transistor, said first transistor changing to a nonconductive state in response to the trailing edge of each input pulse, an integrating network and a first resistor serially connected in a second signal path between said input terminal and the base electrode of said second transistor, the time constant of said integrating network being sufficient to change said second transistor to a conductive state in response to input pulses having a duration greater than a predetermined length, said first resistor being chosen in combination with the time constant of said integrating network and the time constant of said differentiating network such that in response to input pulses having a duration greater than said predetermined length, said second transistor remains in the conductive state for at least the time interval during which said first transistor is in the nonconductive state, thereby producing an output pulse at said output terminal for each input pulse having a duration less than said predetermined length, and inhibiting an output pulse for each input pulse having a duration greater than said predetermined length.

Claim 3

A pulse width discriminator in accordance with claim 1 wherein a second resistor is connected between said output terminal and a second source of potential, said differentiating network being an RC differentiating network comprising a first capacitor connected between said input terminal and the base electrode of said first transistor, and a third resistor connected between a third source of potential and the base electrode of said first transistor, and said integrating network being an RC integrating network comprising a fourth resistor connected between said input terminal and the base electrode of said second transistor, and a second capacitor connected between the base electrode of said second transistor and said source of reference potential.

Claim 4

A pulse width discriminator comprising an input terminal for receiving input pulses having various durations, an output terminal, a first source of reference potential, a second and third source of potential, first and second transistors each having base, emitter and collector electrodes, means for directly connecting the collector electrode of said first transistor to the collector electrode of said second transistor and to said output terminal, means for directly connecting the emitter electrode of said first transistor to the emitter electrode of said second transistor and to said first source of reference potential, a first capacitor connected between said input terminal and the base electrode of said first transistor, a first resistor connected between said base electrode of said first transistor and said second source of potential, a second resistor and a third resistor connected in series between said input terminal and the base electrode of said second transistor, a second capacitor connected between said first source of reference potential and the junction of said second resistor and said third resistor, a fourth resistor connected between said third source of potential and said output terminal, said first transistor changing to a nonconductive state in response to the trailing edge of each input pulse, the time constant formed by the product of the resistance of said second resistor and the capacitance of said second capacitor being sufficient to change said second transistor to a conductive state in response to input pulses having a duration greater than a predetermined length, said third resistor being chosen in combination with the time constant formed by the product of the resistance of said second resistor and the capacitance of said second capacitor such that in response to input pulses having a duration greater than said predetermined length, said second transistor remains in the conductive state for at least the time interval during which said first transistor is in the nonconductive state, thereby providing an output pulse at said output terminal for each input pulse having a duration less than said predetermined length, and inhibiting an output pulse for each input pulse having a duration greater than said predetermined length.

Claim 5

A pulse width discriminator comprising an input terminal for receiving input pulses having various durations, an output terminal, a first source of reference potential, a second and third source of potential, first and second transistors each having base, emitter and collector electrodes, means for directly connecting the collector electrode of said first transistor to the collector electrode of said second transistor and to said output terminal, means for directly connecting the emitter electrode of said first transistor to the emitter electrode of said second transistor and to said first source of reference potential, a first capacitor connected between said input terminal and the base electrode of said first transistor, a first resistor connected between said base electrode of said first transistor and said second source of potential, a second resistor and a third resistor connected in series between said input terminal and the base electrode of said second transistor, a second capacitor connected between said first source of reference potential and the junction of said second resistor and said third resistor, a fourth resistor connected between said third source of potential and said output terminal, said first transistor changing to a nonconductive state in response to the trailing edge of each input pulse, the time constant formed by the product of the resistance of said second resistor and the capacitance of said second capacitor being sufficient to change said second transistor to a conductive state in response to input pulses having a duration greater than a predetermined length, said third resistor being chosen in combination with the time constant formed by the product of the resistance of said second resistor and the capacitance of said second capacitor such that in response to input pulses having a duration greater than said predetermined length, said second transistor remains in the conductive state for at least the time interval during which said first transistor is in the nonconductive state, thereby providing an output pulse at said output terminal for each input pulse having a duration less than said predetermined length, and inhibiting an output pulse for each input pulse having a duration greater than said predetermined length.