Digital electronic timepiece

Claim 1

A digital electronic timepiece comprising a crystal oscillator means for generating a high frequency time standard signal; frequency divider means for dividing the output signal from said oscillator means and deriving a pulse signal of 1 Hz corresponding to one second; a plurality of counter means respectively corresponding to second, minute and hour, and cascade connected, in turn, to the output of the frequency divider means for respectively counting the pulse signals applied from the frequency divider means and simultaneously generating binary code rows varied in response to second, minute and hour, respectively; a liquid crystal display panel consisting of a plurality of time display units corresponding respectively to said counter means, each of said time display units being divided into a plurality of segments arranged so that respective combinations of said segments of such time display unit represent all digits from 0 to 9; a plurality of matrix circuit means, one being connected to each of said counter means for continuously, during the operation of said divider means, receiving and converting the output binary code rows from each of said counter means to the binary code rows corresponding to said segments of said time display units; a plurality of selection circuit means, one being connected to each of said matrix circuit means for continuously, during the operation of said divider means, selectively imparting a driving voltage to the segments of said time display units corresponding to the output binary codes from the respective matrix circuit means; a power source including battery means for driving said oscillator means, divider means, counter means, matrix circuit means, selection circuit means and liquid crystal display panel said selection circuit means including a plurality of transistor means each having an emitter to collector path and a base, each of said emitter to collector paths being connected between an output terminal and ground, the binary codes from said matrix circuit means being respectively individually applied to the base of one of said transistor means, and a load resistor connected betwen each output terminal and said power source, each segment of each time display unit in said liquid crystal display panel being connected between the output terminal of one of said transistor means and ground.