Digital signal transmission apparatus

Claim 2

A digital signal transmission apparatus employing bi-polar bit signals having a first polarity pulse and a second opposite polarity pulse for each information bit, the improvement in a control pulse generating means for processing a bi-polar bit signal comprising a receiving means having an input for receiving the bi-polar bit signal and generating a correspondingly related polarity signal in response to the receipt of each pulse of the generated bipolar a bit signal, means to select the first of said pair generated opposite polarity pulses as the data information, a pulse forming means connected to said receiving means for generating a pulse output in response to the receipt of the pulse of said generated bipolar bit from said receiving means and connected to initiate transfer said generated bi-polar bit signal.

Claim 3

The digital signal transmission apparatus of claim 1 wherein each of said bi-polar bit signals has a predetermined bit period and said pulse forming means includes a pre-clock timing means establishing a first pre-clock pulse of a period substantially less than the bit period, said preclock pulse having a leading edge and a trailing edge, and a clock timing means connected lo said pre-clock timing means and activated by the trailing edge of said pre-clock pulse of said pre-clock timing means, said clock timing means having a clock output defining a clock pulse for controlling transfer of said corresponding bi-polar bit signal.

Claim 4

The digital siGnal transmission apparatus of claim 1 having an inhibit means interconnecting the output of the pulse forming means to the receiving means to inhibit receipt of further information during the period of the pulse output of the pulse forming means.

Claim 5

The digital signal transmission apparatus of claim 2 having said clock output connected to said preclock timing means to inhibit operation of said pre-clock timing means during the period of the clock pulse.

Claim 6

The digital signal transmission apparatus of claim 1 having a clear timing means connected to the pulse forming means and generating a logic clear signal a predetermined quiet time after the creation of pulse output by said pulse forming means.

Claim 7

The digital signal transmission apparatus of claim 5 having a plurality of adjacent bit signals grouped to define message frames separted by quiet periods, and said clear timing means being operative upon the termination of a message frame and during the quiet period between successive message frames to time out and generate a clear signal to reset the apparatus for subsequent processing of a succeeding message frame.

Claim 8

The apparatus of claim 1 including a transmission system comprising a transmitter having a pair of logic switches one responding to a first polarity pulse, and the second of which responds to a second polarity pulse connected to generate a pulse signal in response to a binary logic signal, a single differentiating transformer network coupling each of said logic switch outputs to one of the transmission lines to produce one of said bi-polar bit signals, said receiving means further including a transformer coupled to said transmission lines and a positive voltage detector and a negative voltage detector connected in common to the output of said transformer and responsive to said bi-polar bit signal to generate pulses on a related positive pulse signal line and a negative pulse signal line.

Claim 9

A digital signal transmission apparatus employing bi-polar bit signals for each information bit, the improvement in the control pulse generating means for processing of the bit signal comprising a receiving means having an input for receiving the bi-polar signal having a pair of signal lines having polarity related signals generated by the receiving means, for each polarity of the bi-polar signal, a data storage means coupled to the receiving signal lines and establishing a correspondingly related output data signal in accordance with the first polarity pulse of the bi-polar bit signal, a pre-clock timing means having a pair of inputs connected to both of said signal line means and generating a pulse output in response to the first incoming pulse on said lines, said timing means generating a pulse having a time period less than the total time period of a bi-polar bit signal, a clock timing means connected to said pre-clock timing means and activated by the trailing edge of said output of said pre-clock timing means, said clock pulse means having an output defining a clock pulse for transfer of said corresponding bit signal, an inhibit means interconnecting the output of the clock timing means and to the receiving means and to the preclock timing means to inhibit the receiving means and the preclock timing means during the period of the clock pulse.

Claim 10

A digital signal transmission apparatus employing bi-polar bit signals for each information bit, the improvement in the control pulse generating means for processing of the bit signal comprising a receiving means having an input for receiving the bi-polar signal having a pair of signal lines having polarity related signals generated by the receiving means, for each polarity of the bi-polar signal, a data storage means coupled to the receiving signal lines and establishing a correspondingly related output data signal in accordance with the first polarity pulse of the bi-polar bit signal, a pre-clock timing means having a pair of inputs connected to both of said signal line means and generating a pulse output in response to the first incoming pulse on said lines, said timing means generating a pulse having a time period less than the total time period of a bi-polar bit signal, a clock timing means connected to said pre-clock timing means and activated by the trailing edge of said output of said pre-clock timing means, said clock pulse means having an output defining a clock pulse for transfer of said corresponding bit signal, an inhibit means interconnecting the output of the clock timing means and to the receiving means and to the preclock timing means to inhibit the receiving means and the preclock timing means during the period of the clock pulse.

Claim 11

The digital signal transmission apparatus of claim 8 wherein said apparatus encodes a plurality of information bits into time spaced message frames having preselected quiet periods between the successive message frames, and having clear timing means having a reset input means connected to the output of the pre-clock timing means and generating a logic clear pulse a predetermined time after reset, said clear timing means responding to the termination of a message frame and the quiet period between successive message means to time out and generate a clear signal to reset the apparatus for subsequent processing of a message frame.

Claim 12

The apparatus of claim 9 wherein the clear timing means is a resettable one-shot circuit having a time out period less than the quiet period between message frames but significantly longer than the timing period of each logic bit.

Claim 13

The apparatus of claim 8 wherein the pre-clock timing means is a one-shot circuit having a timing period substantially less than the total period of a bi-polar signal.

Claim 14

The apparatus of claim 8 wherein said clock timing means is a one-shot circuit having a positive output and a not-output, said clock timing means having a timing period significantly greater than the first timing means but less than the time period of the bi-polar signal following such pre-clock timing means, the positive output of said clock timing means constituting a clock output signal and being interconnected to the pre-clock means to inhibit the subsequent operation and said not-output being interconnected to the receiving means to inhibit the receiving means.

Claim 15

The apparatus of claim 8 wherein the pre-clock timing means is a one-shot circuit having a timing period essentially corresponding to one-quarter of the total period of a bi-polar signal, said clock timing means is a one-shot circuit having a timing period significantly essentially corresponding to one-half the period of a bi-polar signal.

Claim 16

The apparatus of claim 13 wherein said clock one-shot circuit has a positive output and a not-output, the positive output of said clock one-shot circuit constituting the clock output signal and being interconnected to inhibit the subsequent operation of the pre-clock one-shot circuit, said not-output being interconnected to the receiving means to inhibit the receiving means.

Claim 17

The digital transmission apparatus of claim 13 wherein said apparatus encodes the information bits into time spaced message frames having preselected quiet periods between the successive message frames, and having a resettable one-shot circuit having a time out period less than the quiet period between message frames but significantly longer than the timing period of each logic bit, said resettable circuit having a reset input means connected to the output of the pre-clock timing means and generating a logic clear pulse a predetermined time after reset, said timing means being operative upon the termination of a message frame and during the quiet period between successive message means to time out and generate a clear signal to reset the apparatus for subsequent processing of a message frame.

Claim 18

The apparatus of claim 15 including a transmission system including a transmitter having a pair of opposite polarity logic switches connected to apply a pulse signal in response to its binary logic input signal, a single differentiating transformer network connecting outputs of each of said logic switches to one of the transmission lines to produce a bi-polar signal, said transmission system including a receiver including a transformer coupled to said transmission lines and a positive voltage detector and a negative voltage detector connected in common to said transformer and responsive to said bi-polar signals to establish a related positive pulse signal and a negative pulse signal in immediate time sequence.

Claim 19

A digital signal transmission apparatus employing bi-polar signals having a first polarity pulse and a second opposite polarity pulse for each information bit, the improvement in a control pulse generating means for processing each of said bit signals comprising a receiving means having an input for receiving each bi-polar signal and generating a pair of corresponding related polarity signals in response to each bi-polar bit signal and having means to select only a predetermined one of each of said pair of opposite polarity signals as the data information, a pulse forming means connected to said receiving means and generating a control pulse output in response to an incoming pulse of said generated bipolar bit signals from said receiving means and connected to initiate a transfer of said generated bi-polar bit sigNal.

Claim 20

A digital signal transmission apparatus employing bi-polar signals having a first polarity pulse and a second opposite polarity pulse for each information bit, the improvement in a control pulse generating means for processing each of said bit signals comprising a receiving means having an input for receiving each bi-polar signal and generating a pair of corresponding related polarity signals in response to each bi-polar bit signal and having means to select only a predetermined one of each of said pair of opposite polarity signals as the data information, a pulse forming means connected to said receiving means and generating a control pulse output in response to an incoming pulse of said generated bipolar bit signals from said receiving means and connected to initiate a transfer of said generated bi-polar bit sigNal.