An integrated semi-conductor device having functional regions isolated by p-n junctions therebetween

Claim 2

An integrated semiconductor circuit device comprising: a body of semiconductor material having first and second surfaces opposite one another, said body including a first plurality of functional regions of a first type adjacent to one another; and a second plurality of functional regions of a second type adjacent to one another and being adjacent to said first plurality of functional region of the first type, each functional region of said first type including a first semiconductor region of a first conductivity type, extending to said first surface of said body, and a second semiconductor region, of a second conductivity type opposite said first conductivity type, extending to said second surface of said body, contacting said first semiconductor region and forming a PN junction therewith, each functional region of said second type including a first semiconductor region of said first conductivity type, extending to said second surface of said body, and a second semiconductor region of said second conductivity type, extending to said first surface of said body, contacting said first semiconductor region of said functional region of said second type and forming a PN junction therewith, and wherein said body further includes means for isolating each of said functional regions from each other comprising a plurality of first isolating semiconductor regions of said second conductivity type extending between and contiguous with each of said functional regions and extending from said first surface to said second surface, and a continuous second isolating semiconductor region of said first conductivity type extending between and contiguous with each of said first isolating semiconductor regions of said plurality of first isolating semiconductor regions and extending from said first surface to said second surface.

Claim 3

An integrated semiconductor device according to claim 1, further comprising: means for ohmically connecting the first semiconductor region of the respective functional regions of said first type to the second semiconductor regions of the respective functional regions of said second type; means for ohmically connecting the second semiconductor regions of the respective functional regions of said first type to each other; and means for ohmically connecting the first semiconductor regions of the respective functional regions of said second type to each other.

Claim 4

An integrated semiconductor device according to claim 1, wherein each first isolating semiconductor region surrounds a respective one of said functional regions.

Claim 5

An integrated semiconductor device according to claim 1, wherein said continuous second isolating semiconductor region surrounds each of said first isolating semiconductor regions.

Claim 6

An integrated semiconductor device according to claim 3, wherein said continuous second isolating semiconductor region surrounds each of said first isolating semiconductor regions.

Claim 7

An integrated semiconductor device according to claim 1, wherein a portion of each of the first semiconductor regions in said functional regions Adjacent to the surface, which is opposite to the surface to which each second semiconductor region extends, has a higher impurity concentration than the reminder of each of the first semiconductor regions.

Claim 8

An integrated semiconductor device according to claim 1, wherein said semiconductor body includes a layer of insulting material selectively formed on each of said first and second surfaces overlying the interfaces of said first and second insulating semiconductor regions of said isolation means and the interfaces of said first isolating semiconductor regions and said functional regions.

Claim 9

An integrated semiconductor device according to claim 7, wherein said body further includes first and second grooves respectively extending into said body from said first and second surfaces thereof, between said first and second pluralities of functional regions and between the functional regions of the same type, respectively, said first and second grooves overlapping said respective interfaces and being filled with glass material as the insulating material therein.

Claim 10

An integrated semiconductor device according to claim 2, wherein said semiconductor body includes a layer of insulating material selectively formed on each of said first and second surfaces overlying the interfaces of said first and second insulating semiconductor regions of said isolation means and the interfaces of said first isolating semiconductor regions and said functional regions.

Claim 11

An integrated semiconductor device according to claim 9, wherein said body further includes first and second grooves respectively extending into said body from said first and second surfaces thereof, between said first and second pluralities of functional regions and between the functional regions of the same type, respectively, said first and second grooves overlapping said respective interfaces and being filled with glass material as the insulating material therein.

Claim 12

An integrated semiconductor device according to claim 9, wherein each of said ohmically connecting means comprises an electrode layer formed on that portion of said insulating material between said functional regions and contacting the respective surfaces of said body within said functional regions thereof.

Claim 13

An integrated semiconductor device according to claim 1, wherein each second semiconductor region of each respective functional region is contiguous with a respective first isolating semiconductor region of said isolating means.

Claim 14

An integrated semiconductor circuit device comprising: a body of semiconductor material having first and second surfaces opposite one another, said body including a first plurality of functional regions of a first type adjacent to one another; and a second plurality of functional regions of a second type adjacent to one another and being adjacent to said first plurality of functional regions of the first type, each functional region of said first type including a first semiconductor region of a first conductivity type, extending to said first surface of said body, and a second semiconductor region, of a second conductivity type opposite said first conductivity type, extending to said second surface of said body, contacting said first semiconductor region and forming a PN junction therewith, each functional region of said second type including a first semiconductor region of said first conductivity type, extending to said second surface of said body, and a second semiconductor region of said second conductivity type, extending to said first surface of said body, contacting said first semiconductor region of said functional region of said second type and forming a PN junction therewith, and wherein said body further includes means for isolating each of said functional regions from one another comprising a plurality of first isolating semiconductor regions of said second conductivity type, respectively surrounding and contiguous with each of said functional Regions of the first type and extending from said first surface to said second surface, a plurality of second isolating semiconductor regions of said first conductivity type, respectively surrounding and contiguous with respective ones of said first isolating regions, and extending from said first surface to said second surface, and a continuous third isolating semiconductor region of said second conductivity type extending between and contiguous with each of said second isolating semiconductor regions, extending between and contiguous with each of said functional regions of the second type, and extending between and contiguous with said functional regions of the second type and said second isolating regions.

Claim 15

An integrated semiconductor circuit device comprising: a body of semiconductor material having first and second surfaces opposite one another, said body including a first plurality of functional regions of a first type adjacent to one another; and a second plurality of functional regions of a second type adjacent to one another and being adjacent to said first plurality of functional regions of the first type, each functional region of said first type including a first semiconductor region of a first conductivity type, extending to said first surface of said body, and a second semiconductor region, of a second conductivity type opposite said first conductivity type, extending to said second surface of said body, contacting said first semiconductor region and forming a PN junction therewith, each functional region of said second type including a first semiconductor region of said first conductivity type, extending to said second surface of said body, and a second semiconductor region of said second conductivity type, extending to said first surface of said body, contacting said first semiconductor region of said functional region of said second type and forming a PN junction therewith, and wherein said body further includes means for isolating each of said functional regions from one another comprising a plurality of first isolating semiconductor regions of said second conductivity type, respectively surrounding and contiguous with each of said functional Regions of the first type and extending from said first surface to said second surface, a plurality of second isolating semiconductor regions of said first conductivity type, respectively surrounding and contiguous with respective ones of said first isolating regions, and extending from said first surface to said second surface, and a continuous third isolating semiconductor region of said second conductivity type extending between and contiguous with each of said second isolating semiconductor regions, extending between and contiguous with each of said functional regions of the second type, and extending between and contiguous with said functional regions of the second type and said second isolating regions.

Claim 16

An integrated semiconductor device according to claim 13, further comprising: means for ohmically connecting the first semiconductor region of the respective functional regions of said first type to the second semiconductor regions of the respective functional regions of said second type; means for ohmically connecting the second semiconductor regions of the respective functional regions of said first type to each other; and means for ohmically connecting the first semiconductor regions of the respective functional regions of said second type to each other.

Claim 17

An integrated semiconductor device according to claim 13, wherein said continuous third isolating semiconductor region surrounds each of said first and second isolating semiconductor regions.

Claim 18

An integrated semiconductor device according to claim 13, wherein a portion of each of the first semiconductor regions in said functional regions adjacent to the surface, which is opposite to the surface to which each second semiconductor region extends, has a higher impurity concentration than the remainder of each of the first semiconductor regions.

Claim 19

An integrated semiconductor device according to claim 13, where said body includes a layer of insulating material selectively formed on each of said first and second surfaces overlying the interfaces between said first, second and third isolating semiconductor regions of said isolation means and the interfaces between said first isolating semiconductor regions and said functional regions of the first type, and the interfaces between said third isolating semiconductor region and said functional regions of the second type.

Claim 20

An integrated semiconductor device according to claim 8, wherein said body further includes first and second grooves respectively extending into said body from said first and second surfaces thereof, between said first and second pluralities of functional regions and between the functional regions of the same type, respectively, said first and second grooves overlapping said respective interfaces and being filled with glass material as the insulating material therein.

Claim 21

An integrated semiconductor device according to claim 14, wherein said body includes a layer of insulating material selectively formed on each of said first and second surfaces overlying the interfaces between said first, second and third isolating semiconductor regions of said isolation means and the interfaces between said first isolating semiconductor regions and said functional regions of the first type, and the interfaces between said third isolating semiconductor region and said functional regions of the second type.

Claim 22

An integrated semiconductor device according to claim 19, wherein said body further includes first and second grooves respectively into said body from said first and second surfaces thereof, between said first and second pluralities of functional regions and between the functional regions of the same type, respectively, said first and second grooves overlapping said respective interfaces and being filled with glass material as the insulating material therein.

Claim 23

An integrated semiconductor device according to claim 19, wherein each of said ohmically connecting means comprises an electrode layer formed on tHat portion of said insulating material between said functional regions and contacting the respective surfaces of said body within said functional regions thereof.

Claim 24

An integrated semiconductor device according to claim 13, wherein each second semiconductor region of each respective functional region of the first type is contiguous with a respective first isolating semiconductor region of said isolating means.

Claim 25

An integrated semiconductor circuit device comprising: a body of semiconductor material having first and second surfaces opposite one another, said body including a first plurality of functional regions of a first type adjacent to one another, and a second plurality of functional regions of a second type adjacent to one another and being adjacent to said first plurality of functional regions of the first type, each functional region of said first type including a first semiconductor region of a first conductivity type, extending to said first surface of said body and a second semiconductor region, of a second conductivity type opposite siad first conductivity type, extending to said second surface of said body, contacting said first semiconductor region and forming a PN junction therewith, each functional region of said second type including a first semiconductor region of said first conductivity type, extending to said second surface of said body, and a second semiconductor region of said second conductivity type, extending to said first surface of said body, contacting said first semiconductor region of said functional region of said second type and forming a PN junction therewith, and wherein said body further includes means for isolating said functional regions from each other comprising a plurality of peripheral semiconductor regions of said first conductivity type, having a relatively high impurity concentration, each of which peripheral regions surrounds and is contiguous with a respective one of said functional regions and extends from said first surface to said second surface, a plurality of thin semiconductor layers of said first conductivity type, and having a relatively low impurity concentration, extending from said first surface to said second surface and respectively surrounding and being contiguous with said peripheral regions, and an isolating semiconductor region of said second conductivity type extending between and contiguous with each of said thin semiconductor layers and extending from said first surface to said second surface.

Claim 26

An integrated semiconductor circuit device comprising: a body of semiconductor material having first and second surfaces opposite one another, said body including a first plurality of functional regions of a first type adjacent to one another, and a second plurality of functional regions of a second type adjacent to one another and being adjacent to said first plurality of functional regions of the first type, each functional region of said first type including a first semiconductor region of a first conductivity type, extending to said first surface of said body and a second semiconductor region, of a second conductivity type opposite siad first conductivity type, extending to said second surface of said body, contacting said first semiconductor region and forming a PN junction therewith, each functional region of said second type including a first semiconductor region of said first conductivity type, extending to said second surface of said body, and a second semiconductor region of said second conductivity type, extending to said first surface of said body, contacting said first semiconductor region of said functional region of said second type and forming a PN junction therewith, and wherein said body further includes means for isolating said functional regions from each other comprising a plurality of peripheral semiconductor regions of said first conductivity type, having a relatively high impurity concentration, each of which peripheral regions surrounds and is contiguous with a respective one of said functional regions and extends from said first surface to said second surface, a plurality of thin semiconductor layers of said first conductivity type, and having a relatively low impurity concentration, extending from said first surface to said second surface and respectively surrounding and being contiguous with said peripheral regions, and an isolating semiconductor region of said second conductivity type extending between and contiguous with each of said thin semiconductor layers and extending from said first surface to said second surface.

Claim 27

An integrated semiconductor device according to claim 23, further comprising: means for ohmically connecting the first semiconductor region of the respective functional regions of said first type to the second semiconductor regions of the respective functional regions of said second type; means for ohmically connecting the second semiconductor regions of the respective functional regions of said first type to each other; and means of ohmically connecting the first semiconductor regions of the respective functional regions of said second type to each other.

Claim 28

An integrated semiconductor device according to claim 23, wherein said isolating semiconductor region surrounds each of said peripheral regions.

Claim 29

An integrated semiconductor device according to claim 23, wherein a portion of each of the first semiconductor regions in said functional region adjacent to the surface, which is opposite to the surface to which each second semiconductor region extends, has a higher impurity concentration than the remainde of each of the first semiconductor regions.

Claim 30

An integrated semiconductor device according to claim 23, wherein said semiconductor body includes a layer of insulating material selectively formed on each of said first and second surfaces overlying the interfaces of said isolating region and said thin semiconductor layers, the interfaces between said respective thin semiconductor layers and said peripheraL regions, and the interfaces between said peripheral regions and said functional regions.

Claim 31

An integrated semiconductor device according to claim 27, wherein said body further includes first and second grooves respectively extending into said body from said first and second surfaces thereof, between said first and second pluralities of functional regions and between the functional regions of the same type, respectively, said first and second grooves overlapping said respective interfaces and being filled with glass material as the insulating material therein.

Claim 32

An integrated semiconductor device according to claim 24, wherein said semiconductor body includes a layer of insulating material selectively formed on each of said first and second surfaces overlying the interfaces of said isolating region and said thin semiconductor layers, the interfaces between said respective thin semiconductor layers and said peripheral regions, and the interfaces between said peripheral regions and said functional regions.

Claim 33

An integrated semiconductor device according to claim 29, wherein said body further includes first and second grooves respectively into said body from said first and second surfaces thereof, between said first and second pluralities of functional regions and between the functional regions of the same type, respectively, said first and second grooves overlapping said respective interfaces and being filled with glass material as the insulating material therein.

Claim 34

An integrated semiconductor device according to claim 29, wherein each of said ohmically connecting means comprises an electrode layer formed on that portion of said insulating material between said functional regions and contacting the respective surfaces of said body within said functional regions thereof.