Non-saturating oscillator and modulator circuit

Claim 2

A non-saturating oscillator and modulator circuit comprising: a potential source; a charging network means and first and second bias potential circuit means parallel coupled intermediate said potential source and a potential reference level; a first differential amplifier means coupled to said charging network means and by an electron device to said first bias potential circuit; and a second differential amplifier means coupled to said charging network means and said first and second bias potential circuit means whereby said first differential amplifier means and said charging network means control development of the charging portion of a sawtooth-shaped potential and said charging network means and second differential amplifier means control the discharging portion of said potential.

Claim 3

The non-saturating oscillator and modulator circuit of claim 1 wherein said electron device is in the form of a diode.

Claim 4

The non-saturating oscillator and modulator circuit of claim 1 wherein said charging network means includes a capacitor coupled to a potential reference level and an integratable first and second bias potential circuit means and first and second differential amplifier means.

Claim 5

A non-saturating oscillator and modulator circuit comprising: a potential source; charging network means and first and second bias potential circuit means parallel coupled intermediate said potential source and a potential reference level; first, second, third, and fourth electron devices with said first and second electron device coupled to said potential source and to said potential reference level by said third electron device, said first electron device being coupled to said charging network means and to said first bias potential circuit means by said fourth electron device with said second electron device coupled to said first bias potential circuit and said third electron device coupled to said second bias potential circuit means; and fifth and sixth electron devices coupled in common to said potential reference level with said fifth electron device coupled to said potential source and first bias potential circuit means and said sixth electron device coupled to said second bias potential circuit means and to said charging network means whereby the charge and discharge of said charging network means provides a substantially sawtooth-shaped waveform.

Claim 6

A non-saturating oscillator and modulator circuit comprising: a potential source; charging network means and first and second bias potential circuit means parallel coupled intermediate said potential source and a potential reference level; first, second, third, and fourth electron devices with said first and second electron device coupled to said potential source and to said potential reference level by said third electron device, said first electron device being coupled to said charging network means and to said first bias potential circuit means by said fourth electron device with said second electron device coupled to said first bias potential circuit and said third electron device coupled to said second bias potential circuit means; and fifth and sixth electron devices coupled in common to said potential reference level with said fifth electron device coupled to said potential source and first bias potential circuit means and said sixth electron device coupled to said second bias potential circuit means and to said charging network means whereby the charge and discharge of said charging network means provides a substantially sawtooth-shaped waveform.

Claim 7

The non-saturating oscillator and modulator circuit of claim 4 wherein said fourth electron device is in the form of a diode.

Claim 8

The non-saturating oscillator and modulator circuit of claim 4 wherein said charging network means includes a first impedance and capacitor series coupling said potential source and potential reference level.

Claim 9

The non-saturating oscillator and modulator circuit of claim 4 wherein said charging network means includes a series connected electron device and capacitor in parallel connection with a second impedance intermediate said potential source and reference level whereby a substantially linear sawtooth waveform is provided at said charging network means.

Claim 10

The non-saturating oscillator and modulator circuit of claim 4 including a source of modulation potential AC coupled to said first bias potential circuit means.

Claim 11

The non-saturating oscillator circuit of claim 4 including a modulation potential source and an electron device with said electron device coupling said modulation potential source to said first bias potential circuit means.

Claim 12

The non-saturating oscillator and modulator circuit of claim 4 including a modulation potential source and a electron device with said electron device coupled to said modulation potential source and intermediate said fifth and sixth electron device and said potential reference level.

Claim 13

In a non-saturating oscillator and modulator circuit having a charging network means coupled to a potential source and to a potential reference level, an integratable circuIt configuration comprising: first and second bias potential circuit means in parallel connection with said charging network means intermediate said potential source and said potential reference level; first, second, third, and fourth electron devices with said first and second electron device coupled to said potential source and to said potential reference level by said third electron device, said first electron device coupled to said charging network means and to said first bias potential circuit means by said fourth electron device with said second electron device coupled to said first bias potential circuit means and said third electron device coupled to said second bias potential network means; and fifth and sixth electron devices coupled in common to said potential reference level, said fifth electron device being coupled to said potential source and to said first bias potential circuit means and said sixth electron device coupled to said second bias potential circuit means and said charging network means whereby said circuit configuration includes an external connection to said potential source, potential reference level, and charging network means.

Claim 14

In a non-saturating oscillator and modulator circuit having a charging network means coupled to a potential source and to a potential reference level, an integratable circuIt configuration comprising: first and second bias potential circuit means in parallel connection with said charging network means intermediate said potential source and said potential reference level; first, second, third, and fourth electron devices with said first and second electron device coupled to said potential source and to said potential reference level by said third electron device, said first electron device coupled to said charging network means and to said first bias potential circuit means by said fourth electron device with said second electron device coupled to said first bias potential circuit means and said third electron device coupled to said second bias potential network means; and fifth and sixth electron devices coupled in common to said potential reference level, said fifth electron device being coupled to said potential source and to said first bias potential circuit means and said sixth electron device coupled to said second bias potential circuit means and said charging network means whereby said circuit configuration includes an external connection to said potential source, potential reference level, and charging network means.

Claim 15

The integratable circuit configuration of claim 11 wherein said fourth electron device is in the form of a diode.

Claim 16

The integratable circuit configuration of claim 11 wherein said first, second, third, fourth, fifth, and sixth electron devices are in the form of transistors.

Claim 17

The integratable circuit configuration of claim 11 wherein said charging network is in the form of a series connected impedance and capacitor.

Claim 18

The integratable circuit configuration of claim 11 wherein said charging network means includes a series connected electron device and capacitor coupled to said potential source and potential reference level and a second impedance coupled to said electron device and intermediate said potential source and potential reference level.

Claim 19

The integratable circuit configuration of claim 11 including a modulation potential source and an electron device coupling said modulation potential source to said first bias potential circuit means.

Claim 20

The integratable circuit configuration of claim 15 including a modulation potential source coupled to said electron device.

Claim 21

An oscillator circuit comprising: a potential source; a charging network means coupling said potential source to a potential reference level; a first bias potential circuit means coupling said potential source to a potential reference level; a second bias potential circuit means coupling said potential source to a potential reference level; first differential amplifier means coupled to said charging network means, said first bias potential circuit means, and intermediate said potential source and potential reference level; second differential amplifier means coupled to said first and second potential circuit means intermediate said potential source and a potential reference level; and wherein said charging network means includes a series connected capacitor, transistor, and impedance coupled to said first differential amplifier means and intermediate said potential source and potential reference level.

Claim 22

An oscillator circuit comprising: a potential source; a charging network means coupling said potential source to a potential reference level; a first bias potential circuit means coupling said potential source to a potential reference level; a second bias potential circuit means coupling said potential source to a potential reference level; first differential amplifier means coupled to said charging network means, said first bias potential circuit means, and intermediate said potential source and potential reference level; second differential amplifier means coupled to said first and second potential circuit means intermediate said potential source and a potential reference level; and wherein said charging network means includes a series connected capacitor, transistor, and impedance coupled to said first differential amplifier means and intermediate said potential source and potential reference level.

Claim 23

The non-saturating oscillator and modulation circuit of claim 4 wherein said charging network means includes a pair of resistors series connected intermediate said potential source and potential reference level with a series connected resistor, electron device, and capacitor shunting said pair of series connected resistors and a modulation potential source coupled to the junction of said pair of series connected resistors and to said electron device.

Claim 24

The integratable circuit configuration of claim 11 including a modulation potential source and an electron device coupling said modulation potential source intermediate said fifth and sixth electron devices and said potential reference level.

Claim 25

An oscillator circuit comprising: a potential source and poteNtial reference level; charging network means including a capacitor means coupled to said potential reference level and an integratable circuit means coupled intermediate said potential source and said capacitor; first and second bias potential circuit means parallel coupled with said charging network means intermediate said potential source and potential reference level; first differential amplifier means coupled to said charging network means and to said first bias potential circuit means and intermediate said potential source and said potential reference level; and second differential amplifier means coupled to said first and second bias potential circuit means and said charging network means and intermediate said potential source and potential reference level.

Claim 26

An oscillator circuit comprising: a potential source and poteNtial reference level; charging network means including a capacitor means coupled to said potential reference level and an integratable circuit means coupled intermediate said potential source and said capacitor; first and second bias potential circuit means parallel coupled with said charging network means intermediate said potential source and potential reference level; first differential amplifier means coupled to said charging network means and to said first bias potential circuit means and intermediate said potential source and said potential reference level; and second differential amplifier means coupled to said first and second bias potential circuit means and said charging network means and intermediate said potential source and potential reference level.

Claim 27

The oscillator circuit of claim 21 wherein said integratable circuit means of said charging network means includes an impedance and a transistor coupled intermediate said potential source and said capacitor.

Claim 28

The oscillator circuit of claim 21 including a potential transfer circuit coupling said first differential amplifier means to said first bias potential circuit means, said transfer circuit means including a first transistor coupled to said first differential amplifier means, said potential source, and a second transistor with said second transistor coupled to said potential reference level and via series connected diodes to said first bias potential circuit means.

Claim 29

The oscillator circuit of claim 21 including a sync pulse signal source and a sync pulse transistor means having a transistor coupled to said sync pulse signal source and via a diode to said first differential amplifier means, to said potential reference level, and to said first bias potential circuit means whereby bias potential applied to said first differential amplifier means from said first bias potential circuit means is altered in response to a signal from said sync pulse signal source.

Claim 30

The oscillator circuit of claim 21 including a sync pulse transistor means coupled to a sync pulse signal source, to said first differential amplifier means, and to said first bias potential circuit means wherein said circuit means of said charging network means, said first and second bias potential circuit means, said first and second differential amplifier means, and said sync pulse transistor means are in the form of an integrated circuit.

Claim 31

The oscillator circuit of claim 21 including a potential transfer circuit coupling said first differential amplifier means to said first bias potential circuit means and to a circuit output means and a sync pulse transistor means coupling a sync pulse signal source to said first differential amplifier means and to said first bias potential circuit means whereby a signal from said sync pulse signal source effects frequency control of said oscillator circuit.