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US3794900A Expired / Lapsed US ⏱️ 0.0 years remaining

Pulse interpolation systems

Assignee: Fujitsu Ltd
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Filing: 1972-09-07
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Granted: 1974-02-26
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Expires: 1992-09-07
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Abstract

Abstract Pulse interpolation system for fast and accurate numerical control of machine tools, having a small scale computer with software which processes and sends out the numerical command; counting means which memorizes said numerical command, the content of said counting means being added or subtracted from each interpolation pulse, and; a pulse generator circuit which provides interpolation pulses from the time when said counting means memorizes said numerical command until the content of said counting means reaches the predetermined value, e.g., zero.

Inventors

  • 👤 K Kobayashi
  • 👤 Y Kato

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 17:39
CPC Classifications
G; G05; G05B; G05B19/00; G05B19/02; G05B19/18; G05B19/41; G05B19/4103; G05B2219/00; G05B2219/30; G05B2219/34; G05B2219/34061; G05B2219/34167; G05B2219/41; G05B2219/41326

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 155 words
A pulse interpolation apparatus for numerical control comprising: a a control computer programmed to compute an interpolation computation to obtain a pre-set command; b a pulse generator circuit providing pulse signals; c counter means having a first input connected to said control computer and being pre-set to a first predetermined value by said pre-set command; d gate means having one input connected to the output of said pulse generator and another input connected to the output of said counter means, said gate means supplying the output pulses of said pulse generator circuit as output interpolation pulses; and e feedback means applying the output of said gate means to the second input of said counter means to reduce the content of said counter means; whereby said gate means inhibits output interpolation pulses and said control computer is interrupted to compute again the interpolation computation when the content of said counter means reaches a second predetermined value.
Claim 2
Dependent Claim 155 words
A pulse interpolation apparatus for numerical control comprising: a a control computer programmed to compute an interpolation computation to obtain a pre-set command; b a pulse generator circuit providing pulse signals; c counter means having a first input connected to said control computer and being pre-set to a first predetermined value by said pre-set command; d gate means having one input connected to the output of said pulse generator and another input connected to the output of said counter means, said gate means supplying the output pulses of said pulse generator circuit as output interpolation pulses; and e feedback means applying the output of said gate means to the second input of said counter means to reduce the content of said counter means; whereby said gate means inhibits output interpolation pulses and said control computer is interrupted to compute again the interpolation computation when the content of said counter means reaches a second predetermined value.
Claim 3
Dependent Claim 28 words
A pulse interpolation system according to claim 7, wherein said central processing unit finds the condition that the content of said counting means reaches the second predetermined value.
Claim 4
Dependent Claim 24 words
A pulse interpolation system according to claim 7, wherein said counting means finds the condition that the content thereof reaches the second predetermined value.
Claim 5
Dependent Claim 15 words
A pulse interpolation system according to claim 7, wherein said second predetermined value is zero.
Claim 6
Dependent Claim 33 words
A pulse interpolation system according to claim 7, further comprising counter means for each axis, and means to detect the condition that the content of all counter means reaches said second predetermined value.
Claim 7
Dependent Claim 21 words
A pulse interpolation system according to claim 7, wherein said interpolation pulses are applied through speed up circuit to pulse motors.

References Cited (Backward Citations)

US3473098A Cited
US3465217A Cited
US3467902A Cited
US3624517A Cited
US3700993A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-02-25 1977-08-27 1978-02-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-02-25 1981-08-27 1982-02-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-02-25 1985-08-27 1986-02-26 $7700.00 Window Closed / Lapsed

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