Patent US3787775A successfully refreshed from Google Patents.
US3787775A
Expired / Lapsed
US
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Phase correction circuit
Assignee: Northrop Grumman Space and Mission Systems Corp
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Filing: 1973-03-28
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Granted: 1974-01-22
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Expires: 1993-03-28
Abstract
Abstract A phase correction circuit for a demodulator for a phase-shift keying, suppressed-carrier communication system. The demodulator for such a coherent phase detector requires means for reintroducing the carrier in proper phase and frequency. To this end a phase-locked loop demodulator is conventionally used including a phase correction circuit sometimes called an I-Q multiplier. The invention provides an improved phase correction circuit which will generate a phase-corrected loop error signal to keep the phase-locked loop locked in phase even during the period when the input signal reverses its polarity. The phase correction circuit includes a reference oscillator and hence operates at an alternating-current signal rather than a directcurrent signal.
Inventors
- 👤 R Lanning
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 20:43
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/227; H04L27/2271; H04L27/2273; H04L27/0014; H04L2027/0044; H04L2027/0063; H04L2027/0067; H04L2027/0069; H04L2027/0071; H04L2027/0073
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
330 words
In a phase-locked loop demodulator for demodulating a biphase modulated, suppressed-carrier signal, the demodulator being of the type including a data phase detector, a loop phase detector, each of said detectors being coupled to a source of input signals, a 90* phase shift network connected between said detectors, first means coupled to said loop phase detector for generating a direct-current loop error signal, a voltagecontrolled oscillator having its output connected between said data phase detector and said phase shift network, said first means generating a direct-current loop error signal of one polarity in response to the phase difference between the input signal and the phase-shifted reference signal being between 0* and 90*, and said loop error signal being of the opposite polarity when said phase difference is between 90* and 180*, second means coupled to said data phase detector for generating a phase change signal of one polarity when the output of said data phase detector is of a predetermined polarity and for generating a phase change signal of the opposite polarity when the data phase detector output is of a polarity opposite to said predetermined polarity, the improvement comprising: a. a phase correction circuit for correcting the phase of said voltage-controlled oscillator and including; b. a suppressed-carrier amplitude modulator coupled to said first means; c. a reference oscillator having one of its outputs coupled to said amplitude modulator; d. a bi-phase modulator coupled to said second means, said reference oscillator having another output coupled to said biphase modulator; and e. an amplitude-sensitive phase detector having its inputs coupled to said bi-phase modulator and to said amplitude modulator, said amplitude modulator controlling the amplitude of the output signal of said amplitude-sensitive phase detector while said bi-phase modulator controls the phase thereof, the output of said amplitude-sensitive phase detector being coupled to the input of said voltage-controlled oscillator to supply a corRected loop error signal, whereby the phase of said voltagecontrolled oscillator is controlled even when the input signal changes polarity.
Claim 2
Dependent Claim
330 words
In a phase-locked loop demodulator for demodulating a biphase modulated, suppressed-carrier signal, the demodulator being of the type including a data phase detector, a loop phase detector, each of said detectors being coupled to a source of input signals, a 90* phase shift network connected between said detectors, first means coupled to said loop phase detector for generating a direct-current loop error signal, a voltagecontrolled oscillator having its output connected between said data phase detector and said phase shift network, said first means generating a direct-current loop error signal of one polarity in response to the phase difference between the input signal and the phase-shifted reference signal being between 0* and 90*, and said loop error signal being of the opposite polarity when said phase difference is between 90* and 180*, second means coupled to said data phase detector for generating a phase change signal of one polarity when the output of said data phase detector is of a predetermined polarity and for generating a phase change signal of the opposite polarity when the data phase detector output is of a polarity opposite to said predetermined polarity, the improvement comprising: a. a phase correction circuit for correcting the phase of said voltage-controlled oscillator and including; b. a suppressed-carrier amplitude modulator coupled to said first means; c. a reference oscillator having one of its outputs coupled to said amplitude modulator; d. a bi-phase modulator coupled to said second means, said reference oscillator having another output coupled to said biphase modulator; and e. an amplitude-sensitive phase detector having its inputs coupled to said bi-phase modulator and to said amplitude modulator, said amplitude modulator controlling the amplitude of the output signal of said amplitude-sensitive phase detector while said bi-phase modulator controls the phase thereof, the output of said amplitude-sensitive phase detector being coupled to the input of said voltage-controlled oscillator to supply a corRected loop error signal, whereby the phase of said voltagecontrolled oscillator is controlled even when the input signal changes polarity.
Claim 3
Dependent Claim
25 words
A loop demodulator as defined in claim 1 wherein an adjustable phase shift network is coupled between said reference oscillator and said suppressed-carrier amplitude modulator.
Claim 4
Dependent Claim
33 words
A loop demodulator as defined in claim 1 wherein an alternating-current amplifier is coupled between said suppressed-carrier amplitude modulator and said amplitude-sensitive phase detector for controlling the gain in said phase correction circuit.
Claim 5
Dependent Claim
114 words
A multiplier for multiplying an in-phase signal with a phase quadrature signal comprising: a. a suppressed-carrier amplitude modulator having an input to which the phase quadrature signal is adapted to be applied; b. a bi-phase modulator having an input terminal to which the in-phase signal is adapted to be applied; c. a reference oscillator having its output terminal coupled to an input terminal of each of said bi-phase modulator and said amplitude modulator; and d. an amplitude-sensitive phase detector having a first input terminal coupled to said amplitude modulator and having a second input terminal coupled to said bi-phase modulator, whereby a phase corrected output signal may be derived from said amplitude-sensitive phase detector.
Claim 6
Dependent Claim
114 words
A multiplier for multiplying an in-phase signal with a phase quadrature signal comprising: a. a suppressed-carrier amplitude modulator having an input to which the phase quadrature signal is adapted to be applied; b. a bi-phase modulator having an input terminal to which the in-phase signal is adapted to be applied; c. a reference oscillator having its output terminal coupled to an input terminal of each of said bi-phase modulator and said amplitude modulator; and d. an amplitude-sensitive phase detector having a first input terminal coupled to said amplitude modulator and having a second input terminal coupled to said bi-phase modulator, whereby a phase corrected output signal may be derived from said amplitude-sensitive phase detector.
Claim 7
Dependent Claim
29 words
A multiplier as defined in claim 4 wherein and adjustable phase shift network is coupled between said reference oscillator and said amplitude modulator for adjusting phase in said multiplier.
Claim 8
Dependent Claim
28 words
A multiplier as defined in claim 4 wherein an alternating-current amplifier is coupled between said amplitude modulator and said phase detector for controlling the gain of said multiplier.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-01-21 | 1977-07-23 | 1978-01-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-01-21 | 1981-07-23 | 1982-01-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-01-21 | 1985-07-23 | 1986-01-22 | $7700.00 | Window Closed / Lapsed |