System for demodulating pulse-number-modulated binary signals

Claim 3

The demodulating system as set forth in claim 1 charactrized in that during the reception a signal corresponding with the state of said other binary signal, said capacitor may be discharged by said first and second discharge means.

Claim 4

A demodulation system as set forth in claim 1 wherein said system further comprises AND gate means adapted to output an AND signal when the output signal representing said one binary signal and the input signal representing said other binary signal are simultaneously applied to said AND gate, said second discharge means being activated in response to said AND signal from said AND gate means.

Claim 5

Apparatus for demodulating pulse code modulated first and second binary signals represented respectively by the presence and absence of a predetermined number of successive pulses of a defined polarity, comprising: storage means and first means responsive to the presence of pulses for changing the contents of the storage means in a first defined direction only when said pulses are present; second and third means each responsive to the absence of pulses for changing the contents of the storage means in a second direction only when said pulses are absent, said second direction being opposite said first direction; means for detecting the contents of the storage means and for providing as an output a first signal when the contents of the storage means are above a first defined threshold, and for providing a second output signal when the contents of the storage means are below a second defined threshold; output means for providing an output signal representing said first binary signal in response to the provision of said first signal by the detecting means and for providing an output signal representing saiD second binary signal in response to the provision of said second signal by the detecting means; and means for disabling one of said second and third means and for thereby causing only one of said second and third changing means to change the contents of the storage means when a defined one of said first and second binary signals is provided by the output means, and for causing both said second and third changing means to change the contents of the storage means when the other one of said first and second binary signals is provided by the output means.

Claim 6

Apparatus for demodulating pulse code modulated first and second binary signals represented respectively by the presence and absence of a predetermined number of successive pulses of a defined polarity, comprising: storage means and first means responsive to the presence of pulses for changing the contents of the storage means in a first defined direction only when said pulses are present; second and third means each responsive to the absence of pulses for changing the contents of the storage means in a second direction only when said pulses are absent, said second direction being opposite said first direction; means for detecting the contents of the storage means and for providing as an output a first signal when the contents of the storage means are above a first defined threshold, and for providing a second output signal when the contents of the storage means are below a second defined threshold; output means for providing an output signal representing said first binary signal in response to the provision of said first signal by the detecting means and for providing an output signal representing saiD second binary signal in response to the provision of said second signal by the detecting means; and means for disabling one of said second and third means and for thereby causing only one of said second and third changing means to change the contents of the storage means when a defined one of said first and second binary signals is provided by the output means, and for causing both said second and third changing means to change the contents of the storage means when the other one of said first and second binary signals is provided by the output means.

Claim 7

Apparatus as in claim 4 wherein the storage means comprises means for storing an analog voltage signal, and the first, second and third means for changing the contents of the storage means comprise means for changing the level of the voltage signal stored in said storage means.

Claim 8

Apparatus as in claim 5 wherein the storage means comprises a capacitor.

Claim 9

Apparatus as in claim 5 wherein the first means comprises means for increasing the level of the voltage signal stored in the storage means, and the second and third means comprise means for decreasing the level of the voltage signal stored in the storage means.

Claim 10

Apparatus as in claim 7 wherein the first binary signal provided by the output means represents a binary 1, and wherein the disabling means disables the third changing means when said first binary signal representing a binary 1 is provided by the output means.

Claim 11

Apparatus as in claim 8 wherein the disabling means comprises an AND-gate receiving as one of its inputs a signal representing the absence of said pulses, receiving as another of its inputs a signal representing said first binary signal provided by the output means, and providing an AND-gate output only when both inputs are present, said AND-gate output disabling the third changing means.

Claim 12

Apparatus as in claim 4 wherein said storage means comprises means for storing a voltage signal, the first changing means comprises means for increasing the level of said voltage signal, the second and third changing means comprise means for decreasing the level of said voltage signal, the detecting means comprise means for providing a first signal when the voltage signal in the storage means is above a first defined threshold and for providing a second signal when the voltage signal in the storage means is below a second defined threshold, the output means comprise means for providing an output representing said first binary signal in response to the presence of said signal provided by the detecting means and for providing said second binary signal in response to said second output signal from the detecting means, and the disabling means comprise means responsive to the concurrence of an absence of said pulses and to the provision of said first binary signal by the output means to disable the third changing means.

Claim 13

Apparatus for demodulating pulse code modulated first and second binary signals represented respectively by the presence and absence of a predetermined number of successive pulses of a defined polarity, comprising: storage means and first means connected thereto and responsive to the presence of pulses for changing the contents of the storage means in a first direction only when said pulses are present; second and third means each connected to the storage means and each responsive to the absence of pulses for changing the contents of the storage means in a second defined direction only when said pulses are absent, said second direction being opposite said first direction; means for detecting the contents of the storage means and for providing as an output a first signal when the contents of the storage means are in a first defined range and for providing as an output a second signal when the contents of the storage means are in a second defined range; output means for providing an output signal representing one of said first and second binary signal in response to the detecting means providing said First output signal and for providing an output signal representing the other one of said first and second binary signal in response to the detecting means providing its second output signal; and means for disabling the third changing means and for thereby causing only the second changing means to change the contents of the storage means when a defined one of said first and second binary signal is provided by the output means, and for causing both said second and third changing means to change the contents of the storage means when the other one of said first and second binary signal is provided by the output means.

Claim 14

Apparatus for demodulating pulse code modulated first and second binary signals represented respectively by the presence and absence of a predetermined number of successive pulses of a defined polarity, comprising: storage means and first means connected thereto and responsive to the presence of pulses for changing the contents of the storage means in a first direction only when said pulses are present; second and third means each connected to the storage means and each responsive to the absence of pulses for changing the contents of the storage means in a second defined direction only when said pulses are absent, said second direction being opposite said first direction; means for detecting the contents of the storage means and for providing as an output a first signal when the contents of the storage means are in a first defined range and for providing as an output a second signal when the contents of the storage means are in a second defined range; output means for providing an output signal representing one of said first and second binary signal in response to the detecting means providing said First output signal and for providing an output signal representing the other one of said first and second binary signal in response to the detecting means providing its second output signal; and means for disabling the third changing means and for thereby causing only the second changing means to change the contents of the storage means when a defined one of said first and second binary signal is provided by the output means, and for causing both said second and third changing means to change the contents of the storage means when the other one of said first and second binary signal is provided by the output means.