Multi-step phase shift modulator demodulator

Claim 2

A phase modulator for modulating a carrier wave by a multiplicity of phase shift steps comprising: first means for receiving first and second input pulse trains and for transcoding said input pulse trains into first and second logic signals, each representative of the relative phase difference between selected bit positions of said first and second respective input pulse trains, the delay time between said first and second input pulse trains and said first and second logic signals being equal to an integral multiple of the bit period, including delay means for controlling said delay time to a value of twice the bit period; and second means, coupled to said first means, for combining said first and second logic signals with a carrier wave to effect the multiple step phase shift modulation thereof.

Claim 3

A phase modulator according to claim 1, wherein said first means further includes first and second bistable circuits coupled to the input and output of said delay means for respectively effecting the calibration of the phases of said first and second pulse trains and said first and second logic signals.

Claim 4

A phase modulator according to claim 2, wherein said first means further includes respective first and second logic circuits connecting said first bistable circuits to said delay means for combining the outputs thereof and said logic signals according to a preselected logic equation.

Claim 5

A phase modulator according to claim 2, wherein said second means comprises means for generating first and second carrier wave signals shifted in phase with respect to each other by a preselected phase angle including a carrier wave generator supplying a carrier wave at a predetermined carrier wave frequency, a first modulator element receiving said carrier wave and modulating said carrier wave at a prescribed fraction of the frequency corresponding to said bit period by providing alternative positive and negative phase shifts to said wave at said prescribed fraction of said bit period corresponding frequency, and means for combining the output of said first modulator element with the output of said carrier wave generator delayed by said preselected phase angle; second and third modulator elements coupled to the outputs of said carrier wave signal generating means and responsive to said first and second logic signals for modulating said first and second carrier wave signals by said first and second logic signals; and means coupled to the outputs of said second and third modulators for combining the outputs thereof to produce a multiple step phase shifted carrier wave.

Claim 6

A phase modulator according to claim 4, wherein said preselected phase angle is 90* and said fraction is one-half.

Claim 7

A phase modulator according to claim 5, wherein said means for combining the output of said first modulator element comprising an adjustable attenuator and a summing circuit connected in series thereto.

Claim 8

A demodulator device comprising: first means for receiving an input signal to be demodulated; second means, coupled to said first means, for producing first and second signals therefrom, comprising first and second circuits each of which includes a delay line and a phase comparator, each having an inpuT coupled to said first means, the output of a respective delay line coupled to an input of a respective phase comparator, the output of each respective phase comparator being connected to an input of a respective pulse regenerator, and further comprising a third circuit including a delay circuit and a phase comparator circuit, each of which has an input coupled to said first means, the output of said delay circuit being connected to the input of said phase comparator circuit, the output of said phase comparator circuit being connected in series with a band-pass filter centered on half the modulation frequency, and a frequency doubler connected thereto, the output of which is applied to said respective pulse regenerators, whereby information signals are produced therefrom.

Claim 9

A demodulator device comprising: first means for receiving an input signal to be demodulated; second means, coupled to said first means, for producing first and second signals therefrom, comprising first and second circuits each of which includes a delay line and a phase comparator, each having an inpuT coupled to said first means, the output of a respective delay line coupled to an input of a respective phase comparator, the output of each respective phase comparator being connected to an input of a respective pulse regenerator, and further comprising a third circuit including a delay circuit and a phase comparator circuit, each of which has an input coupled to said first means, the output of said delay circuit being connected to the input of said phase comparator circuit, the output of said phase comparator circuit being connected in series with a band-pass filter centered on half the modulation frequency, and a frequency doubler connected thereto, the output of which is applied to said respective pulse regenerators, whereby information signals are produced therefrom.

Claim 10

A demodulator device for a system in which information is conveyed over a carrier wave by multiple phase modulation thereof, said phase modulation being in the form of stepped phase shifts between successive respective odd and even numbered bits, comprising first means for receiving a multiple phase modulated carrier wave; second means, coupled to said first means, for quadrupling the carrier wave frequency; second means, coupled to said third means for delaying the output thereof and comparing the phase of said delayed output with the phase of the output of said second means; and a band-pass filter and a wave shaping element coupled in series to the output of said third means; whereby the clock frequency of the information signal by which said carrier wave is modulated is extracted.

Claim 11

A demodulator device for a system in which information is conveyed over a carrier wave by multiple phase modulation thereof, said phase modulation being in the form of stepped phase shifts between successive respective odd and even numbered bits, comprising first means for receiving a multiple phase modulated carrier wave; second means, coupled to said first means, for quadrupling the carrier wave frequency; second means, coupled to said third means for delaying the output thereof and comparing the phase of said delayed output with the phase of the output of said second means; and a band-pass filter and a wave shaping element coupled in series to the output of said third means; whereby the clock frequency of the information signal by which said carrier wave is modulated is extracted.

Claim 12

An information transmission system comprising: first means for generating a carrier wave; second means, coupled to said first means, for modulating said first means in accordance with information in a plurality of information signal trains, including means for imparting a multiplicity of phase shift steps to said carrier wave in accordance with the respective data in said plurality of information signal trains, including means for receiving first and second input pulse trains and for transcoding said input pulse trains into first and second logic signals, each of which is representative of the relative phase difference between selected bit positions of said first and second respective input pulse trains, the delay time between said first and second input pulses trains and said first and second logic signals being equal to an integral multiple of the bit period of the clock frequency of said input pulse trains; and third means, responsive to the multiple phase modulated carrier wave, for demodulating said carrier wave to obtain the respective ones of said plurality of information signal trains, including means for extracting the clock frequency of said information signals and means for combining said extracted clock frequency with first and second respective phase demodulated components of said carrier wave, to thereby produce the respective ones of said plurality of information signal trains.

Claim 13

An information transmission system comprising: first means for generating a carrier wave; second means, coupled to said first means, for modulating said first means in accordance with information in a plurality of information signal trains, including means for imparting a multiplicity of phase shift steps to said carrier wave in accordance with the respective data in said plurality of information signal trains, including means for receiving first and second input pulse trains and for transcoding said input pulse trains into first and second logic signals, each of which is representative of the relative phase difference between selected bit positions of said first and second respective input pulse trains, the delay time between said first and second input pulses trains and said first and second logic signals being equal to an integral multiple of the bit period of the clock frequency of said input pulse trains; and third means, responsive to the multiple phase modulated carrier wave, for demodulating said carrier wave to obtain the respective ones of said plurality of information signal trains, including means for extracting the clock frequency of said information signals and means for combining said extracted clock frequency with first and second respective phase demodulated components of said carrier wave, to thereby produce the respective ones of said plurality of information signal trains.

Claim 14

An information transmission system according to claim 9, wherein said first means comprises an oscillator for producing a carrier wave frequency signal at a prescribed carrier wave frequency, a first modulator element, coupled to the output of said oscillator for modulating said carrier wave frequency signal by a fraction of said clock frequency by imparting alternate positive and negative phase shifts to said oscillator output; and summing means for combining the output of said first modulator element with the output of said oscillator delayed by a preselected phase angle, to thereby provide said carrier wave.

Claim 15

An information transmission system according to claim 10, wherein said second means further includes second and third modulator elements, responsive to the outputs of said transcoding means said receiving first and second carrier wave components corresponding to the carrier wave output of said summing means at respective inputs thereof delayed with respect to each otHer by said preselected phase angle, for modulating said first and second carrier wave components by said first and second logic signals produced by said transcoding means, and means coupled to the outputs of said second and third modulator elements, for combining the outputs thereof to produce a multiple step phase shifted carrier wave.

Claim 16

An information transmission system according to claim 11, wherein said third means comprises first and second phase comparators and first and second demodulator delay lines connected to one respective input thereof, the other inputs of said phase comparators and the inputs of said delay lines being coupled to receive the phase modulated carrier wave, and to produce at the outputs of said phase comparators first and second phase compared demodulation signals, and first and second pulse regenerators coupled to the output of said clock frequency extracting means and receiving said first and second respective phase compared demodulation signals for producing first and second demodulated output signals corresponding to said plurality of information signal trains.

Claim 17

An information transmission system according to claim 12, wherein said clock frequency extracting means comprising a third phase comparator and a third demodulator delay line connected to one input thereof, the inputs of said third phase comparator and said third delay line being coupled to receive the phase modulated carrier wave, a filter centered at one-half the clock frequency connected to the output of said third phase comparator and a frequency doubling circuit coupled between the output of said filter and the inputs of said pulse regenerators.

Claim 18

An information transmission system according to claim 12, wherein said clock frequency extracting means comprises multiplier means, responsive to the phase modulated carrier wave, for generating a signal representative of four times the carrier frequency, a third phase comparator and a third demodulator delay line connected to one input thereof, the inputs of said third phase comparator and said third delay line being coupled to receive the output of said multiplier means, and a filter and a wave shaping circuit coupled in series between the output of said third phase comparator and the respective inputs of said pulse regenerators.

Claim 19

An information transmission system according to claim 9, wherein said transcoding means comprises first and second respective pairs of bistable circuits, the first of each pair receiving respective ones of said plurality of information signal trains corresponding to said first and second input pulse trains together with a series of clock pulses, a pair of respective transcoding logic circuits and delay circuits coupled in series between the outputs of said first bistable circuits and the inputs of said second bistable circuits,said second bistable circuits also receiving said series of clock pulses, the outputs of said second bistable circuits being coupled to said second and third modulator elements.

Claim 20

An information transmission system according to claim 14, wherein said transcoding means comprises first and second respective pairs of bistable circuits, the first of each pair receiving respective ones of said plurality of information signal trains corresponding to said first and second input pulse trains together with a series of clock pulses, a pair of respective transcoding logic circuits and delay circuits coupled in series between the outputs of said first bistable circuits and the inputs of said second bistable circuits, said second bistable circuits also receiving said series of clock pulses, the outputs of said second bistable circuits being coupled to said second and third modulator elements.

Claim 21

An information transmission system according to claim 9, wherein said integral multiple is at least two.

Claim 22

An information transmission system according to claim 16, wherein said integral multiple is at least two.